74CBTLV3245 Datasheet by Nexperia USA Inc.

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LV324 amp (GE GE Table 1. Ordering information nexpefla
74CBTLV3245
8-bit bus switch with output enable
Rev. 4 — 12 April 2019 Product data sheet
1. General description
The 74CBTLV3245 is an 8-pole, single-throw bus switch. The device features a single output
enable input (OE) that controls eight switch channels. The switches are disabled when OE is
HIGH. Schmitt-trigger action at control inputs makes the circuit tolerant of slower input rise and
fall times. This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device when it
is powered down.
2. Features and benefits
Supply voltage range from 2.3 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
5 Ω switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
IOFF circuitry provides partial Power-down mode operation
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
PackageType number
Temperature range Name Description Version
74CBTLV3245PW -40 °C to +125 °C TSSOP20 plastic thin shrink small outline package;
20 leads; body width 4.4 mm
SOT360-1
74CBTLV3245BQ -40 °C to +125 °C DHVQFN20 plastic dual-in-line compatible thermal
enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 × 4.5 × 0.85 mm
SOT764-1
74CBTLV3245 ,% @@@@@@@@ @ U @ e a EEEEEDBE D N J J J J J J J J 15 19 fi jjjjjjjjjj mv EEEEEEEEEE
Nexperia 74CBTLV3245
8-bit bus switch with output enable
4. Functional diagram
001aan323
2
19
18
B1
A1
OE
3
17
B2
A2
4
16
B3
A3
5
15
B4
A4
6
14
B5
A5
7
13
B6
A6
8
12
B7
A7
9
11
B8
A8
Fig. 1. Logic symbol
001aan324
OE
nA nB
Fig. 2. Logic diagram (one switch)
5. Pinning information
5.1. Pinning
74CBTLV3245
n.c. VCC
A1 OE
A2 B1
A3 B2
A4 B3
A5 B4
A6 B5
A7 B6
A8 B7
GND B8
001aan325
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
Fig. 3. Pin configuration SOT360-1 (TSSOP20)
001aan327
74CBTLV3245
Transparent top view
B7
A7
A8
B6
A6 B5
A5 B4
A4 B3
A3 B2
A2 B1
A1
GND(1)
OE
GND
B8
n.c.
VCC
9 12
8 13
7 14
6 15
5 16
4 17
3 18
2 19
10
11
1
20
terminal 1
index area
(1) This is not a supply pin. The substrate is
attached to this pad using conductive die attach
material. There is no electrical or mechanical
requirement to solder this pad. However, if it is
soldered, the solder land should remain floating or
be connected to GND.
Fig. 4. Pin configuration SOT764-1 (DHVQFN20)
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 2 / 15
74C BTLV3245 Table 2. Pin description
Nexperia 74CBTLV3245
8-bit bus switch with output enable
5.2. Pin description
Table 2. Pin description
Symbol Pin Description
nc 1 not connected
A1 to A8 2, 3, 4, 5, 6, 7, 8, 9 data input/output (A port)
GND 10 ground (0 V)
B1 to B8 18, 17, 16, 15, 14, 13, 12, 11 data input/output (B port)
OE 19 output enable input (active LOW)
VCC 20 positive supply voltage
6. Functional description
Table 3. Function selection
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
Input Input/output
OE An, Bn
L An = Bn
H Z
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +4.6 V
VIinput voltage [1] -0.5 +4.6 V
VSW switch voltage enable and disable mode [1] -0.5 VCC + 0.5 V
IIK input clamping current VI < -0.5 V -50 - mA
ISK switch clamping current VI < -0.5 V -50 - mA
ISW switch current VSW = 0 V to VCC - ±128 mA
ICC supply current - +100 mA
IGND ground current -100 - mA
Tstg storage temperature -65 +150 °C
Ptot total power dissipation Tamb = -40 °C to +125 °C [2] - 500 mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP20 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN20 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K.
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 3 / 15
74C BTLV3245 Table 5. Recommended operating conditions EYE e Fig. 5 e Fig. 6 GE
Nexperia 74CBTLV3245
8-bit bus switch with output enable
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 2.3 3.6 V
VIinput voltage 0 3.6 V
VSW switch voltage enable and disable mode 0 VCC V
Tamb ambient temperature -40 +125 °C
Δt/ΔV input transition rise and fall rate VCC = 2.3 V to 3.6 V [1] - 200 ns/V
[1] Applies to control signal levels.
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions voltages are referenced to GND (ground = 0 V).
Tamb = -40 °C to +85 °C Tamb = -40 °C
to +125 °C
Symbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - VVIH HIGH-level input
voltage VCC = 3.0 V to 3.6 V 2.0 - - 2.0 - V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 VVIL LOW-level input
voltage VCC = 3.0 V to 3.6 V - - 0.9 - 0.9 V
IIinput leakage
current
pin OE; VI = GND to VCC;
VCC = 3.6 V
- - ±1 - ±20 μA
IS(OFF) OFF-state leakage
current
VCC = 3.6 V; see Fig. 5 - - ±1 - ±20 μA
IS(ON) ON-state leakage
current
VCC = 3.6 V; see Fig. 6 - - ±1 - ±20 μA
IOFF power-off leakage
current
VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±10 - ±50 μA
ICC supply current VI = GND or VCC; IO = 0 A;
VSW = GND or VCC; VCC = 3.6 V
- - 10 - 50 μA
ΔICC additional supply
current
pin OE; VI = VCC - 0.6 V;
VSW = GND or VCC; VCC = 3.6 V
[2] - - 300 - 2000 μA
CIinput capacitance pin OE; VCC = 3.3 V;
VI = 0 V to 3.3 V
- 0.9 - - - pF
CS(OFF) OFF-state
capacitance
VCC = 3.3 V; VI = 0 V to 3.3 V - 5.2 - - - pF
CS(ON) ON-state
capacitance
VCC = 3.3 V; VI = 0 V to 3.3 V - 14.3 - - - pF
[1] All typical values are measured at Tamb = 25 °C.
[2] One input at 3 V, other inputs at VCC or GND.
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 4 / 15
74C BTLV3245 c = 2.3 :0 2.7 v Fig. 3 Fig. 10 c = 3.0 Via 3.6 v; Fig. 11 Fig. 13
Nexperia 74CBTLV3245
8-bit bus switch with output enable
9.1. Test circuits
AA
001aan328
GND
OE
Bn
VIH
VI
ISIS
VO
VCC
An
VI = VCC or GND and VO = GND or VCC.
Fig. 5. Test circuit for measuring OFF-state leakage
current (one switch)
A
001aan329
GND
OE
An
VIL
VI
IS
VO
VCC
Bn
VI = VCC or GND and VO = open circuit.
Fig. 6. Test circuit for measuring ON-state leakage
current (one switch)
9.2. ON resistance
Table 7. Resistance RON
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7.
Tamb = -40 °C to +85 °C Tamb = -40 °C
to +125 °C
Symbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
VCC = 2.3 V to 2.7 V;
see Fig. 8 to Fig. 10
[2]
ISW = 64 mA; VI = 0 V - 4.2 8.0 - 15.0 Ω
ISW = 24 mA; VI = 0 V - 4.2 8.0 - 15.0 Ω
ISW = 15 mA; VI = 1.7 V - 8.4 40 - 60.0 Ω
VCC = 3.0 V to 3.6 V;
see Fig. 11 to Fig. 13
ISW = 64 mA; VI = 0 V - 4.0 7.0 - 11.0 Ω
ISW = 24 mA; VI = 0 V - 4.0 7.0 - 11.0 Ω
RON ON resistance
ISW = 15 mA; VI = 2.4 V - 6.2 15 - 25.5 Ω
[1] Typical values are measured at Tamb = 25 °C and nominal VCC.
[2] Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 5 / 15
74C BTLV3245 mm I? W 4k //\ /4 ‘ > E /‘ l/ . #l W WW 001mm [3 fiA (3) ”J _//— .
Nexperia 74CBTLV3245
8-bit bus switch with output enable
9.3. ON resistance test circuit and graphs
001aan330
GND
OE
An
VIL
VI
VSW
VCC
Bn
V
ISW
RON = VSW / ISW.
Fig. 7. Test circuit for measuring ON resistance
(one switch)
VI (V)
0 2.52.01.0 1.50.5
001aai109
7
5
9
11
RON
(Ω)
3
(1)
(3)
(4)
(2)
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 8. ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 15 mA
VI (V)
0 2.52.01.0 1.50.5
001aai110
7
5
9
11
RON
(Ω)
3
(1)
(3)
(4)
(2)
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 9. ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 24 mA
VI (V)
0 2.52.01.0 1.50.5
001aai111
7
5
9
11
RON
(Ω)
3
(1)
(3)
(4)
(2)
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 10. ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 64 mA
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 6 / 15
74C BTLV3245 001m ms m /-\ m /« / V 7m /
Nexperia 74CBTLV3245
8-bit bus switch with output enable
VI (V)
0 431 2
001aai105
4
6
8
RON
(Ω)
2
(1)
(4)
(2)
(3)
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 11. ON resistance as a function of input voltage;
VCC = 3.3 V; ISW = 15 mA
VI (V)
0 431 2
001aai106
4
6
8
RON
(Ω)
2
(1)
(4)
(2)
(3)
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 12. ON resistance as a function of input voltage;
VCC = 3.3 V; ISW = 24 mA
VI (V)
0 431 2
001aai107
4.5
3.5
5.5
6.5
7.5
RON
(Ω)
2.5
(1)
(4)
(2)
(3)
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 13. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 64 mA
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 7 / 15
74C BTLV3245 Fig. 16 Table 9
Nexperia 74CBTLV3245
8-bit bus switch with output enable
10. Dynamic characteristics
Table 8. Dynamic characteristics
GND = 0 V; for test circuit see Fig. 16
Tamb = -40 °C to +85 °C Tamb = -40 °C
to +125 °C
Symbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
An to Bn or Bn to An;
see Fig. 14
[2][3]
VCC = 2.3 V to 2.7 V - - 0.13 - 0.20 ns
tpd propagation delay
VCC = 3.0 V to 3.6 V - - 0.20 - 0.31 ns
OE to An or Bn; see Fig. 15 [4]
VCC = 2.3 V to 2.7 V 1.0 3.4 5.5 1.0 8.0 ns
ten enable time
VCC = 3.0 V to 3.6 V 1.0 3.0 4.9 1.0 7.0 ns
OE to An or Bn; see Fig. 15 [5]
VCC = 2.3 V to 2.7 V 1.0 3.0 5.5 1.0 8.0 ns
tdis disable time
VCC = 3.0 V to 3.6 V 1.0 3.4 5.8 1.0 8.5 ns
[1] All typical values are measured at Tamb = 25 °C and at nominal VCC.
[2] The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the load capacitance,
when driven by an ideal voltage source (zero output impedance).
[3] tpd is the same as tPLH and tPHL.
[4] ten is the same as tPZH and tPZL.
[5] tdis is the same as tPHZ and tPLZ.
10.1. Waveforms and test circuit
001aai367
VMVM
VMVM
VI
input
0 V
VOH
output
VOL
tPHL tPLH
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 14. The data input (An, Bn) to output (Bn, An) propagation delay times
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 8 / 15
74C BTLV3245 Table 9 Table 9. Measurement points Table 10
Nexperia 74CBTLV3245
8-bit bus switch with output enable
001aan331
GND
GND
VCC
VOL
VOH
VI
VMVM
VM
VY
VX
tPLZ tPZL
tPHZ tPZH
switch
disabled
switch
enabled
switch
enabled
VM
output
LOW to OFF
OFF to LOW
output
HIGH to OFF
OFF to HIGH
OE input
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 15. Enable and disable times
Table 9. Measurement points
Supply voltage Input Output
VCC VMVItr = tfVMVXVY
2.3 V to 2.7 V 0.5VCC VCC ≤ 2.0 ns 0.5VCC VOL + 0.15 V VOH - 0.15 V
3.0 V to 3.6 V 0.5VCC VCC ≤ 2.0 ns 0.5VCC VOL + 0.3 V VOH - 0.3 V
VMVM
tW
tW
10 %
90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VMVM
90 %
10 %
tf
tr
tr
tf
001aae331
VEXT
VCC
VIVO
DUT
CL
RT
RL
RL
G
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 16. Test circuit for measuring switching times
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 9 / 15
74C BTLV3245 Table 10. Test data Fig. 17
Nexperia 74CBTLV3245
8-bit bus switch with output enable
Table 10. Test data
Supply voltage Load VEXT
VCC CLRLtPLH, tPHL tPZH, tPHZ tPZL, tPLZ
2.3 V to 2.7 V 30 pF 500 Ω open GND 2VCC
3.0 V to 3.6 V 50 pF 500 Ω open GND 2VCC
10.2. Additional dynamic characteristics
Table 11. Additional dynamic characteristics
GND = 0 V.
Tamb = 25 °CSymbol Parameter Conditions
Min Typ Max
Unit
f(-3dB) -3 dB frequency response VCC = 3.3 V; RL = 50 Ω; see Fig. 17 [1] - 406 - MHz
[1] fi is biased at 0.5VCC.
001aan156
GND
OE
Bn An
VCC 0.5VCC
VIL
fi
RL
dB
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads -3 dB.
Fig. 17. Test circuit for measuring the frequency response when channel is in ON-state
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 10 / 15
74C BTLV3245 6/1 T + + Q: HHHfiDHLH H HJHm E
Nexperia 74CBTLV3245
8-bit bus switch with output enable
11. Package outline
UNIT A
1 A
2 A
3 b
p c D
(1) E (2) (1)
e H
E L L
p Q Z y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3 0.65 6.6
6.2
0.4
0.3
0.5
0.2
8
0
o
o
0.13 0.1 0.2 1
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT360-1 MO-153 99-12-27
03-02-19
w M
b
p
D
Z
e
0.25
1 10
20 11
pin 1 index
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v M A
X
A
y
0 2.5 5 mm
scale
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
A
max.
1.1
Fig. 18. Package outline SOT360-1 (TSSOP20)
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 11 / 15
74C BTLV3245 DHVQFNZU: plastic dual in-line compalinle lnermal enhanced very min quad llal package; no leads; 201erminals; body 2.5 x 4.5 x 0.55 mm l l 1 fi/ ~ ~~~~~~~ l ~~~~~~~~ * *er: , l l |:| PEI l ”Bl" l ‘ll 5336““ ‘l ;J U U UlU U U U T D ‘ «E4 l 5’ iiiiii k? i’Eg :7 £1 ‘ l, \ flflflfllflflflfl "le g© W
Nexperia 74CBTLV3245
8-bit bus switch with output enable
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT764-1 - - -
MO-241
- - -
sot764-1_po
03-01-27
14-12-12
Unit
mm
max
nom
min
1.00 0.05 4.6 3.15 2.6
0.5 3.5 0.1
A(1)
Dimensions (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
A1b
0.30
c D(1) DhE(1) Eh
1.00
e e1L
0.4
v w
0.05
y y1
0.90 0.02 0.2 4.5 3.00 2.50.25 0.05 0.1
0.85 0.30.80 0.00 4.4 2.85 2.40.18
1.15 0.5
detail X
B A
e1
e
e
C
y
C
y1
X
AC B
v
C
w
scale
A
A1
c
L
Eh
Dh
b
2 9
19 12
11
10
1
20
D
E
terminal 1
index area
terminal 1
index area
0 5 mm2.5
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm SOT764-1
Fig. 19. Package outline SOT764-1 (DHVQFN20)
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 12 / 15
74C BTLV3245 Table 12. Abbreviations Table 13. Revision history Additional dynamic chammerislics
Nexperia 74CBTLV3245
8-bit bus switch with output enable
12. Abbreviations
Table 12. Abbreviations
Acronym Description
CDM Charged Device Model
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
13. Revision history
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74CBTLV3245 v.4 20190412 Product data sheet - 74CBTLV3245 v.3
Modifications: The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Type number 74CBTLV3245DS (SOT724-1) removed.
74CBTLV3245 v.3 20161111 Product data sheet - 74CBTLV3245 v.2
Modifications: Additional dynamic characteristics added.
74CBTLV3245 v.2 20111215 Product data sheet - 74CBTLV3245 v.1
Modifications: Legal pages updated.
74CBTLV3245 v.1 20101230 Product data sheet - -
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 13 / 15
74C BTLV3245 same In a deswgn on new sheet’ .5 exp‘amed in status er den/ms) described 2 «ms documenl was publish es. The latest produd slam hugs waw nexg mm sale 7 Max us or eon ns Mcomme m me genera‘ ierm and can m llwww nex er
Nexperia 74CBTLV3245
8-bit bus switch with output enable
14. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification This document contains data from
the preliminary specification.
Product [short]
data sheet
Production This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
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74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 14 / 15
74C BTLV3245
Nexperia 74CBTLV3245
8-bit bus switch with output enable
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning.........................................................................2
5.2. Pin description............................................................. 3
6. Functional description................................................. 3
7. Limiting values............................................................. 3
8. Recommended operating conditions..........................4
9. Static characteristics....................................................4
9.1. Test circuits..................................................................5
9.2. ON resistance..............................................................5
9.3. ON resistance test circuit and graphs..........................6
10. Dynamic characteristics............................................ 8
10.1. Waveforms and test circuit........................................ 8
10.2. Additional dynamic characteristics...........................10
11. Package outline........................................................ 11
12. Abbreviations............................................................ 13
13. Revision history........................................................13
14. Legal information......................................................14
© Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 12 April 2019
74CBTLV3245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved
Product data sheet Rev. 4 — 12 April 2019 15 / 15

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