LTC1751(-3.3, -5) Datasheet by Analog Devices Inc.

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‘ ' I tI\pLTC]751/LTC]751-3.3/LTC1751-5 T ECHNOLOGY L7LJIJWW
1
LTC1751/LTC1751-3.3/LTC1751-5
APPLICATIO S
U
FEATURES
DESCRIPTIO
U
TYPICAL APPLICATIO
U
Micropower, Regulated
Charge Pump
DC/DC Converters
5V Output Current: 100mA (V
IN
3V)
3.3V Output Current: 80mA (V
IN
2.5V)
Ultralow Power: 20µA Quiescent Current
Regulated Output Voltage: 3.3V ±4%, 5V ±4%, ADJ
No Inductors
Short-Circuit/Thermal Protection
V
IN
Range: 2V to 5.5V
800kHz Switching Frequency
Very Low Shutdown Current: <2µA
Shutdown Disconnects Load from V
IN
PowerGood/Undervoltage Output
Adjustable Soft-Start Time
Available in an 8-Pin MSOP Package
Li-Ion Battery Backup Supplies
Local 3V and 5V Conversion
Smart Card Readers
PCMCIA Local 5V Supplies
White LED Backlighting
The LTC
®
1751 family are micropower charge pump DC/
DC converters that produce a regulated output voltage at
up to 100mA. The input voltage range is 2V to 5.5V.
Extremely low operating current (20µA typical with no
load) and low external parts count (one flying capacitor
and two small bypass capacitors at V
IN
and V
OUT
) make
them ideally suited for small, battery-powered applica-
tions.
The LTC1751 family operate as Burst Mode
TM
switched
capacitor voltage doublers to achieve ultralow quiescent
current. They have thermal shutdown capability and can
survive a continuous short circuit from V
OUT
to GND. The
PGOOD pin on the LTC1751-3.3 and LTC1751-5 indicates
when the output voltage has reached its final value and if
the output has an undervoltage fault condition. The FB pin
of the adjustable LTC1751 can be used to program the
desired output voltage or current. An optional soft-start
capacitor may be used at the SS pin to prevent excessive
inrush current during start-up.
The LTC1751 family is available in an 8-pin MSOP
package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
V
IN
SHDN
SS
GND
2
1
6
5
3
7
8
4
V
OUT
PGOOD
C
+
C
LTC1751-5
V
OUT
5V ±4%
I
OUT
100mA, V
IN
3V
I
OUT
50mA, V
IN
2.7V
V
IN
2.7V
TO 5.5V C2
10µF
C
FLY
1µF
PGOOD
R1
100k
OFF ON
1751 TA01
C1
10µF
C
FLY
= MURATA GRM39X5R105K6.3AJ
C1, C2 = MURATA GRM40X5R106K6.3AJ
Regulated 5V Output from a 2.7V to 5.5V Input
Output Voltage vs Input Voltage
INPUT VOLTAGE (V)
2.5
4.8
OUTPUT VOLTAGE (V)
4.9
5.0
5.1
5.2
3.0 3.5 4.0 4.5
1751 TA02
5.0 5.5
I
OUT
= 50mA
C
FLY
= 1µF
C
OUT
= 10µF
T
A
= 25°C
T
A
= –40°C
T
A
= 85°C
PfiCKflGE/OBDEB I FOB fl'I'IOI'I mmmm uuuu L7LrL EAR
2
LTC1751/LTC1751-3.3/LTC1751-5
ORDER PART
NUMBER
LTC1751EMS8
LTC1751EMS8-3.3
LTC1751EMS8-5
TJMAX = 150°C, θJA = 160°C/W
*PGOOD ON LTC1751-3.3/LTC1751-5
FB ON LTC1751
Consult factory for parts specified with wider operating temperature ranges.
The denotes specifications which apply over the full specified
temperature range, otherwise specifications are at TA = 25°C. CFLY = 1µF, CIN = 10µF, COUT = 10µF unless otherwise noted.
(Note 1)
V
IN
to GND..................................................0.3V to 6V
PGOOD, FB, V
OUT
to GND ...........................0.3V to 6V
SS, SHDN to GND........................ 0.3V to (V
IN
+ 0.3V)
V
OUT
Short-Circuit Duration............................. Indefinite
I
OUT
(Note 2)....................................................... 125mA
Operating Temperature Range (Note 3) .. 40°C to 85°C
Storage Temperature Range ................ 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
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ELECTRICAL CHARACTERISTICS
1
2
3
4
FB/PGOOD*
V
OUT
V
IN
GND
8
7
6
5
SS
SHDN
C
+
C
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
MS8 PART MARKING
LTKL
LTKN
LTKP
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
LTC1751-3.3
V
IN
Input Supply Voltage 2 4.4 V
V
OUT
Output Voltage 2V V
IN
4.4V, I
OUT
40mA 3.17 3.3 3.43 V
2.5V V
IN
4.4V, I
OUT
80mA 3.17 3.3 3.43 V
I
CC
Operating Supply Current 2V V
IN
4.4V, I
OUT
= 0mA, SHDN = V
IN
18 40 µA
V
R
Output Ripple V
IN
= 2.5V, I
OUT
= 40mA 68 mV
P-P
ηEfficiency V
IN
= 2V, I
OUT
= 40mA 80 %
LTC1751-5
V
IN
Input Supply Voltage 2.7 5.5 V
V
OUT
Output Voltage 2.7V V
IN
5.5V, I
OUT
50mA 4.8 5 5.2 V
3V V
IN
5.5V, I
OUT
100mA 4.8 5 5.2 V
I
CC
Operating Supply Current 2.7V V
IN
5.5V, I
OUT
= 0mA, SHDN = V
IN
20 50 µA
V
R
Output Ripple V
IN
= 3V, I
OUT
= 50mA 75 mV
P-P
ηEfficiency V
IN
= 3V, I
OUT
= 50mA 82 %
LTC1751
V
IN
Input Supply Voltage 2 5.5 V
I
CC
Operating Supply Current 2V V
IN
5.5V, I
OUT
= 0mA, SHDN = V
IN
(Note 4 ) 16 40 µA
V
FB
FB Regulation Voltage 2V V
IN
5.5V, I
OUT
20mA 1.157 1.205 1.253 V
I
FB
FB Input Current V
FB
= 1.3V –50 50 nA
R
OUT
Open-Loop Charge Pump Strength V
IN
= 2V, V
OUT
= 3.3V (Note 5) 8.5 20
V
IN
= 2.7V, V
OUT
= 5V (Note 5) 6.0 12
‘ .74}! \ _ ’<-‘ l7ljijww="">
3
LTC1751/LTC1751-3.3/LTC1751-5
The denotes specifications which apply over the full specified
temperature range, otherwise specifications are at TA = 25°C. CFLY = 1µF, CIN = 10µF, COUT = 10µF unless otherwise noted.
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Based on long term current density limitations.
Note 3: The LTC1751EMS8-X is guaranteed to meet performance
specifications from 0°C to 70°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 4: The no load input current will be approximately I
CC
plus twice the
standing current in the resistive output divider.
Note 5: R
OUT
(2V
IN
– V
OUT
)/I
OUT
.
Note 6: See Figure 2.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Output Voltage vs Load Current
LOAD CURRENT (mA)
0
3.20
OUTPUT VOLTAGE (V)
3.25
3.30
3.35
3.40
25 50 75 100
1751 G01
125 150
T
A
= 25°C
C
FLY
= 1µF
V
IN
= 2V
V
IN
= 2.5V
INPUT VOLTAGE (V)
2.0
OUTPUT VOLTAGE (V)
3.30
3.35
4.0
1751 G02
3.25
3.20 2.5 3.0 3.5 4.5
3.40 I
OUT
= 40mA
C
FLY
= 1µF
C
OUT
= 10µFT
A
= –40°C
T
A
= 85°C
T
A
= 25°C
INPUT VOLTAGE (V)
2.0
SUPPLY CURRENT (µA)
20
30
4.0
1751 G03
10
02.5 3.0 3.5 4.5
40 I
OUT
= 0mA
C
FLY
= 1µF
V
SHDN
= V
IN
T
A
= 85°C
T
A
= 25°C
T
A
= –40°C
Output Voltage vs Input Voltage No Load Supply Current
vs Input Voltage
(LTC1751-3.3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
LTC1751-3.3/LTC1751-5
UVL PGOOD Undervoltage Low Threshold Relative to Regulated V
OUT
(Note 6) –11 –7 –3 %
UVH PGOOD Undervoltage High Threshold Relative to Regulated V
OUT
(Note 6) –8 –4.5 –2 %
V
OL
PGOOD Low Output Voltage I
PGOOD
= –500µA0.4 V
I
OH
PGOOD High Output Leakage V
PGOOD
= 5.5V 1µA
LTC1751/LTC1751-3.3/LTC1751-5
I
SHDN
Shutdown Supply Current V
IN
3.6V, V
OUT
= 0V, V
SHDN
= 0V 0.01 2 µA
3.6V < V
IN
, V
OUT
= 0V, V
SHDN
= 0V 5µA
V
IH
SHDN Input Threshold (High) 1.5 V
V
IL
SHDN Input Threshold (Low) 0.3 V
I
IH
SHDN Input Current (High) SHDN = V
IN
–1 1 µA
I
IL
SHDN Input Current (Low) SHDN = 0V –1 1 µA
t
r
V
OUT
Rise Time V
IN
= 3V, I
OUT
= 0mA, 10% to 90% (Note 6) 0.6ms/nF • C
SS
sec
f
OSC
Switching Frequency Oscillator Free Running 800 kHz
T 740°C L7LJHW
4
LTC1751/LTC1751-3.3/LTC1751-5
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Power Efficiency vs Load Current Short-Circuit Output Current
vs Input Voltage
LOAD CURRENT (mA)
0.001
40
EFFICIENCY (%)
50
60
70
80
0.01 0.1 1 10 100
1751 G04
30
20
10
0
90
100
V
IN
= 2.75V
V
IN
= 2V
V
IN
= 4.4V
V
IN
= 3.3V
T
A
= 25°C
C
FLY
= 1µF
C
OUT
= 10µF
INPUT VOLTAGE (V)
2.0
OUTPUT CURRENT (mA)
150
200
4.0
1751 G05
100
50 2.5 3.0 3.5 4.5
250 T
A
= 25°C
C
FLY
= 1µF
Start-Up
C
SS
= 10nF 2ms/DIV 1751 G06
SHDN
2V/DIV
PGOOD
5V/DIV
V
OUT
1V/DIV
Output Ripple
V
IN
= 2.5V 5µs/DIV 1751 G07
I
OUT
= 80mA
C
OUT
= 10µF
V
OUT
AC COUPLED
50mV/DIV
Load Transient Response
V
IN
= 2.5V 50µs/DIV 1751 G08
V
OUT
AC COUPLED
50mV/DIV
I
OUT
40mA/DIV
(LTC1751-3.3)
(LTC1751-5)
OUTPUT CURRENT (mA)
0
OUTPUT VOLTAGE (V)
5.0
5.1
200
1751 G09
4.9
4.8 50 100 150
V
IN
= 3V
5.2 T
A
= 25°C
C
FLY
= 1µF
V
IN
= 2.7V
Output Voltage vs Output Current No Load Supply Current
vs Input Voltage
INPUT VOLTAGE (V)
2.5
0
SUPPLY CURRENT (µA)
10
20
30
40
3.0 3.5 4.0 4.5
1751 G10
5.0 5.5
C
FLY
= 1µF
I
OUT
= 0
V
SHDN
= V
IN
T
A
= 85°C
T
A
= 25°C
T
A
= –40°C
SHDN W Shut L7LJIJWW
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LTC1751/LTC1751-3.3/LTC1751-5
UU
U
PI FU CTIO S
PGOOD (Pin 1) (LTC1751-3.3/LTC1751-5): Output Volt-
age Status Indicator. On start-up, this open-drain pin re-
mains low until the output voltage, VOUT, is within 4.5%
(typ) of its final value. Once VOUT is valid, PGOOD becomes
high-Z. If, due to a fault condition, VOUT falls 7% (typ) below
its correct regulation level, PGOOD pulls low. PGOOD may
be pulled up through an external resistor to any appropri-
ate reference level.
FB (Pin 1) (LTC1751): The voltage on this pin is compared
to the internal reference voltage (1.205V) by the error
comparator to keep the output in regulation. An external
resistor divider is required between V
OUT
and FB to pro-
gram the output voltage.
V
OUT
(Pin 2): Regulated Output Voltage. For best perfor-
mance, V
OUT
should be bypassed with a 6.8µF (min) low
ESR capacitor as close to the pin as possible .
V
IN
(Pin 3): Input Supply Voltage. V
IN
should be bypassed
with a 6.8µF (min) low ESR capacitor.
GND (Pin 4): Ground. Should be tied to a ground plane for
best performance.
C
(Pin 5): Flying Capacitor Negative Terminal.
C
+
(PIN 6): Flying Capacitor Positive Terminal.
SHDN (Pin 7): Active Low Shutdown Input. A low on
SHDN disables the device. SHDN must not be allowed to
float.
SS (Pin 8): Soft-Start Programming Pin. A capacitor on SS
programs the start-up time of the charge pump so that
large start-up input current is eliminated.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Power Efficiency vs Load Current Short-Circuit Output Current
vs Input Voltage
Start-Up
C
SS
= 10nF 2ms/DIV 1751 G13
SHDN
2V/DIV
PGOOD
5V/DIV
V
OUT
2V/DIV
Output Ripple
V
IN
= 3V 5µs/DIV 1751 G14
I
OUT
= 100mA
C
OUT
= 10µF
V
OUT
AC COUPLED
50mV/DIV
Load Transient Response
V
IN
= 3V 50µs/DIV 1751 G15
V
OUT
AC COUPLED
50mV/DIV
I
OUT
50mA/DIV
(LTC1751-5)
LOAD CURRENT (mA)
0.001
40
EFFICIENCY (%)
50
60
70
80
0.01 0.1 1 10 100
1751 G11
30
20
10
0
90
100
V
IN
= 2.7V
V
IN
= 4.1V
V
IN
= 5.5V
T
A
= 25°C
C
FLY
= 1µF
C
OUT
= 10µF
INPUT VOLTAGE (V)
2.0
50
OUTPUT CURRENT (mA)
100
150
200
250
2.5 3.0 3.5 4.0
1751 G12
4.5 5.0 5.5
T
A
= 25°C
C
FLY
= 1µF
‘—[]i [J— [J— [J— L7LJHW
6
LTC1751/LTC1751-3.3/LTC1751-5
LTC1751
+
V
REF
FB
V
OUT
V
IN
GND
2µA
SS
SHDN
C
+
C
1751 BD2
COMP1
CHARGE PUMP
CONTROL
2 7
18
6
3
5
4
SI PLIFIED
W
BLOCK DIAGRA S
W
+
+
+
+
V
REF
PGOOD
V
OUT
V
IN
GND
2µA
SS
SHDN
C
+
C
1751 BD1
READY
UNDERV
COMP1
CHARGE PUMP
CONTROL
+
2 7
18
6
3
5
4
LTC1751-3.3/LTC1751-5
L7LJIJWW
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LTC1751/LTC1751-3.3/LTC1751-5
APPLICATIO S I FOR ATIO
WUUU
Operation (Refer to Simplified Block Diagrams)
The LTC1751 family uses a switched capacitor charge
pump to boost V
IN
to a regulated output voltage. Regula-
tion is achieved by sensing the output voltage through a
resistor divider and enabling the charge pump when the
divided output drops below the lower trip point of COMP1.
When the charge pump is enabled, a 2-phase
nonoverlapping clock activates the charge pump switches.
The flying capacitor is charged to V
IN
on phase 1 of the
clock. On phase 2 of the clock, it is stacked in series with
V
IN
and connected to V
OUT
. This sequence of charging and
discharging the flying capacitor continues at the clock
frequency until the divided output voltage reaches the
upper trip point of COMP1. Once this happens the charge
pump is disabled. When the charge pump is disabled the
device typically draws less than 20µA from V
IN
thus
providing high efficiency under low load conditions.
In shutdown mode all circuitry is turned off and the
LTC1751 draws only leakage current from the V
IN
supply.
Furthermore, V
OUT
is disconnected from V
IN
. The SHDN
pin is a CMOS input with a threshold voltage of approxi-
mately 0.8V. The LTC1751 is in shutdown when a logic low
is applied to the SHDN pin. The quiescent supply current
of the LTC1751 will be slightly higher if the SHDN pin is
driven high with a voltage that is below V
IN
than if it is
driven all the way to V
IN
. Since the SHDN pin is a high
impedance CMOS input it should never be allowed to float.
To ensure that its state is defined it must always be driven
with a valid logic level.
Power Efficiency
The efficiency (η) of the LTC1751 family is similar to that
of a linear regulator with an effective input voltage of twice
the actual input voltage. This occurs because the input
current for a voltage doubling charge pump is approxi-
mately twice the output current. In an ideal regulated
doubler the power efficiency would be given by:
η= = =
P
P
VI
VI
V
V
OUT
IN
OUT OUT
IN OUT
OUT
IN
•2 2
At moderate to high output power, the switching losses
and quiescent current of the LTC1751 are negligible and
the expression is valid. For example, an LTC1751-5 with
V
IN
= 3V, I
OUT
= 50mA and V
OUT
regulating to 5V, has a
measured efficiency of 82% which is in close agreement
with the theoretical 83.3% calculation. The LTC1751 prod-
uct family continues to maintain good efficiency even at
fairly light loads because of its inherently low power
design.
Short-Circuit/Thermal Protection
During short-circuit conditions, the LTC1751 will draw
between 200mA and 400mA from V
IN
causing a rise in the
junction temperature. On-chip thermal shutdown circuitry
disables the charge pump once the junction temperature
exceeds approximately 160°C and re-enables the charge
pump once the junction temperature drops back to ap-
proximately 150°C. The device will cycle in and out of
thermal shutdown indefinitely without latchup or damage
until the short circuit on V
OUT
is removed.
V
IN
, V
OUT
Capacitor Selection
The style and value of capacitors used with the LTC1751
family determine several important parameters such as
output ripple, charge pump strength and minimum
start-up time.
To reduce noise and ripple, it is recommended that low
ESR (<0.1) capacitors be used for both C
IN
and C
OUT
.
These capacitors should be either ceramic or tantalum and
should be 6.8µF or greater. Aluminum capacitors are not
recommended because of their high ESR. If the source
impedance to V
IN
is very low, up to several megahertz, C
IN
may not be needed. Alternatively, a somewhat smaller
value of input capacitor may be adequate, but will not be
as effective in preventing ripple on the V
IN
pin.
The value of C
OUT
controls the amount of output ripple.
Increasing the size of C
OUT
to 10µF or greater will reduce
the output ripple at the expense of higher minimum turn on
time and higher start-up current. See the section Output
Ripple.
L7LJHW
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LTC1751/LTC1751-3.3/LTC1751-5
APPLICATIO S I FOR ATIO
WUUU
Flying Capacitor Selection
Warning: A polarized capacitor such as tantalum or
aluminum should never be used for the flying capacitor
since its voltage can reverse upon start-up of the LTC1751.
Low ESR ceramic capacitors should always be used for
the flying capacitor.
The flying capacitor controls the strength of the charge
pump. In order to achieve the rated output current, it is
necessary to have at least 0.6µF of capacitance for the
flying capacitor. Capacitors of different materials lose their
capacitance with higher temperature and voltage at differ-
ent rates. For example, a ceramic capacitor made of X7R
material will retain most of its capacitance from –40°C to
85°C, whereas, a Z5U or Y5V style capacitor will lose
considerable capacitance over that range. Z5U and Y5V
capacitors may also have a very strong voltage coefficient
causing them to lose 50% or more of their capacitance
when the rated voltage is applied. The capacitor
manufacturer’s data sheet should be consulted to deter-
mine what value of capacitor is needed to ensure 0.6µF at
all temperatures and voltages.
Generally an X7R ceramic capacitor is recommended for
the flying capacitor with a minimum value of 1µF. For very
low load applications, it may be reduced to 0.01µF-0.68µF.
A smaller flying capacitor delivers less charge per clock
cycle to the output capacitor resulting in lower output
ripple. The output ripple is reduced at the expense of
maximum output current and efficiency.
The theoretical minimum output resistance of a voltage
doubling charge pump is given by:
RVV
IfC
OUT MIN IN OUT
OUT
()
≡=
21
Where f if the switching frequency and C is the value of the
flying capacitor. (Using units of MHz and µF is convenient
since they cancel each other.) Note that the charge pump
will typically be weaker than the theoretical limit due to
additional switch resistance. However, for light load appli-
cations, the above expression can be used as a guideline
in determining a starting capacitor value.
Below is a list of ceramic capacitor manufacturers and
how to contact them:
AVX www.avxcorp.com
Kemet www.kemet.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
Vishay www.vishay.com
Output Ripple
Low frequency
regulation mode
ripple exists due to the
hysteresis in the sense comparator and propagation
delays in the charge pump control circuits. The amplitude
and frequency of this ripple are heavily dependent on the
load current, the input voltage and the output capacitor
size. For large VIN the ripple voltage can become substan-
tial because the increased strength of the charge pump
causes fast edges that may outpace the regulation cir-
cuitry. In some cases, rather than bursting, a single
output cycle may be enough to boost the output voltage
into or possibly beyond regulation. In these cases the
average output voltage will climb slightly. For large input
voltages a larger output capacitor will ensure that burst-
ing always occurs, thus mitigating possible DC problems.
Generally the regulation ripple has a sawtooth shape
associated with it.
A high frequency ripple component may also be present
on the output capacitor due to the charge transfer action
of the charge pump. In this case, the output can display a
voltage pulse during the output-charging phase. This
pulse results from the product of the charging current and
the ESR of the output capacitor. It is proportional to the
input voltage, the value of the flying capacitor and the ESR
of the output capacitor.
For example, typical combined output ripple for an
LTC1751-5 with V
IN
= 3V under maximum load is
75mV
P-P
with a low ESR 10µF output capacitor. A smaller
output capacitor and/or larger output current load will
result in higher ripple due to higher output voltage slew
rates.
L7LJIJWW
9
LTC1751/LTC1751-3.3/LTC1751-5
Note that when using a larger output capacitor the mini-
mum turn-on time of the device will increase.
Soft-Start
The LTC1751 family has built-in soft-start circuitry to
prevent excessive current flow at V
IN
during start-up. The
soft-start time is programmed by the value of the capacitor
at the SS pin. Typically a 2µA current is forced out of SS
causing a ramp voltage on the SS pin. The regulation loop
follows this ramp voltage until the output reaches the
correct regulation level. SS is automatically pulled to
ground whenever SHDN is low. The typical rise time is
given by the expression:
t
r
= 0.6ms/nF • C
SS
For example, with a 4.7nF capacitor the 10% to 90% rise
time will be approximately 2.8ms. If the output charge
storage capacitor is 10µF, then the average output current
for an LTC1751-5 will be 4V/2.8ms • 10µF or 14mA, giving
28mA at the V
IN
pin.
The soft-start feature is optional. If there is no capacitor
on SS, the output voltage of the LTC1751 will ramp up as
quickly as possible. The start-up time will depend on
APPLICATIO S I FOR ATIO
WUUU
There are several ways to reduce output voltage ripple.
For applications requiring V
IN
to exceed 3.3V or for
applications requiring <100mV of peak-to-peak ripple, a
larger C
OUT
capacitor (22µF or greater) is recommended.
A larger capacitor will reduce both the low and high
frequency ripple due to the lower charging and discharg-
ing slew rates as well as the lower ESR typically found
with higher value (larger case size) capacitors. A low ESR
ceramic output capacitor will minimize the high fre-
quency ripple, but will not reduce the low frequency
ripple unless a high capacitance value is used. An R-C
filter may also be used to reduce high frequency voltages
spikes (see Figure 1).
various parameters such as temperature, output loading,
charge pump and flying capacitor values and input
voltage.
PGOOD and Undervoltage Detection
The PGOOD pin on the LTC1751-3.3/LTC1751-5 performs
two functions. On start-up, it indicates when the output
has reached its final regulation level. After start-up, it
indicates when a fault condition, such as excessive load-
ing, has pulled the output out of regulation.
Once the LTC1751-3.3/LTC1751-5 are enabled via the
SHDN pin, V
OUT
ramps to its final regulation value slowly
by following the SS pin. The PGOOD pin switches from low
impedance to high impedance after V
OUT
reaches its
regulation value. If V
OUT
is subsequently pulled below its
correct regulation level, the PGOOD pin pulls low again
indicating that a fault exists. Alternatively, if there is a short
circuit on V
OUT
preventing it from ever reaching its correct
regulation level, the PGOOD pin will remain low. The lower
fault threshold, UVL, is preprogrammed to recognize
errors of –7% below nominal V
OUT
. The upper fault
threshold, UVH, is preprogrammed at –4.5% below nomi-
nal. Figure 2 shows an example of the PGOOD pin with a
normal start-up followed by an undervoltage fault.
Using an external pull-up resistor, the PGOOD pin can be
pulled high from any available voltage supply, including
the LTC1751-3.3/LTC1751-5 V
OUT
pin.
If PGOOD is not used it may be connected to GND.
+
LTC1751-X
V
OUT
1
10µF
TANT
+
10µF
TANT
V
OUT
5V
1751 F01
Figure 1. Output Ripple Reduction Technique
SHDN
PGOOD
V
OUT
UVL
TIME
17515 F02
UVH
t
r
10%
90%
Figure 2. PGOOD During Start-Up and Undervoltage
W L7LJHW
10
LTC1751/LTC1751-3.3/LTC1751-5
Programming the LTC1751 Output Voltage (FB Pin)
While the LTC1751-3.3/LTC1751-5 versions have internal
resistive dividers to program the output voltage, the
programmable LTC1751 may be set to an arbitrary voltage
via an external resistive divider. Since it employs a voltage
doubling charge pump, it is not possible to achieve output
voltages greater than twice the available input voltage.
Figure 3 shows the required voltage divider connection.
The voltage divider ratio is given by the expression:
R
R
V
V
OUT
1
2 1 205 1=.
APPLICATIO S I FOR ATIO
WUUU
2
1
4
V
OUT
FB
GND
R1
1751 F03
C
OUT
R2
V
OUT
1.205V 1 + R1
R2
()
Figure 3. Programming the Adjustable LTC1751
+
2V
IN
+
V
OUT
1751 F04
R
OUT
Typical R
OUT
values as a function of input voltage are
shown in Figure 5.
Figure 4. Equivalent Open-Loop Circuit
Figure 5. Typical ROUT vs Input Voltage
The sum of the voltage divider resistors can be made large
to keep the quiescent current to a minimum. Any standing
current in the output divider (given by 1.205V/R2) will be
reflected by a factor of 2 in the input current. Typical values
for total voltage divider resistance can range from several
ks up to 1M.
Maximum Available Output Current
For the adjustable LTC1751, the maximum available out-
put current and voltage can be calculated from the effec-
tive open-loop output resistance, R
OUT
, and effective
output voltage, 2V
IN(MIN)
.
From Figure 4 the available current is given by:
IVV
R
OUT IN OUT
OUT
=2–
Figure 6. Recommended Layout
Layout Considerations
Due to high switching frequency and high transient cur-
rents produced by the LTC1751 product family, careful
board layout is necessary. A true ground plane and short
connections to all capacitors will improve performance and
ensure proper regulation under all conditions. Figure 6
shows the recommended layout configuration.
Thermal Management
For higher input voltages and maximum output current,
there can be substantial power dissipation in the
LTC1751. If the junction temperature increases above
approximately 160°C, the thermal shutdown circuitry
will automatically deactivate the output. To reduce the
maximum junction temperature, a good thermal connec-
tion to the PC board is recommended. Connecting the
GND pin (Pin 4) to a ground plane, and maintaining a
solid ground plane under the device on two layers of the
PC board, will reduce the thermal resistance of the
package and PC board system considerably.
V
OUT
V
IN
GND
SHDN
17515 F03
INPUT VOLTAGE (V)
2.0
OUTPUT RESISTANCE ()
6
8
10
4.0
1751 F05
4
2
02.5 3.0 3.5 4.5
T
A
= 25°C
C
FLY
= 1µF
I
OUT
= 100mA
I
OUT
= 50mA
flh IIH '— IVE \ IH|~ u”— | l—II'IHH «H l~ ah ”H I~ .||— L7LJIJWW
11
LTC1751/LTC1751-3.3/LTC1751-5
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
TYPICAL APPLICATIO S
U
1751 TA04
1µF
LTC1751-5
C
+
C
V
OUT
GND
V
IN
SHDN
SS
2
65
1
4
3
7
8PGOOD
V
OUT
= 5V
PGOOD
10µF10µF
1nF
1
100k
1751 TA05
1µF
LTC1751-5
C
+
C
V
OUT
GND
V
IN
SHDN
SS
2
65
1
4
3
7
8
PGOOD
10µF10µF10µF
75k V
OUT
= 5V
I
OUT
100mA
HIGH = BACKUP MODE
100k
+
1
2
3
4
5
6
7
8
+
+
+
3-CELL
NiCd
BATTERY
330pF
1.43M
475k
IN4148
BAT54C
LTC1540
Si4435DY
V
IN
= 5V
10k
1M
HYST
1751 TA07
C
+
C
V
OUT
GND
V
IN
SHDN
SS
2
65
1
4
3
7
8FB
10µF10µF
1µF
R
X
ON
OFF
I
L
= 1.205V
R
X
LOAD
V
OUT
2 V
IN
V
IN
LTC1751
USB Port to Regulated 5V Power Supply with Soft-Start
Low Power Battery Backup with Auto Switchover and No Reverse Current
2-Cell NiCd or NiMH to 3.3V with Low Standby Current
Boosted Constant Current Source
1751 TA06
1µF
LTC1751-3.3
C
+
C
V
OUT
GND
V
IN
SHDN
SS
2
65
1
4
3
7
8PGOOD
3.3V
40mA
PGOOD
10µF10µF
1nF
100k
ON
OFF
2-CELL
NiCd OR
NiMH
+
+
r... I’H‘l L7LJHI§AP
12
LTC1751/LTC1751-3.3/LTC1751-5
LINEAR TECHNOLOGY CORPORATION 2000
1751f LT/TP 0401 4K • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear-tech.com
PART NUMBER DESCRIPTION COMMENTS
LTC1144 Charge Pump Inverter with Shutdown V
IN
= 2V to 18V, 15V to –15V Supply
LTC1262 12V, 30mA Flash Memory Prog. Supply Regulated 12V ±5% Output, I
Q
= 500µA
LTC1514/LTC1515 Buck/Boost Charge Pumps with I
Q
= 60µA 50mA Output at 3V, 3.3V or 5V; 2V to 10V Input
LTC1516 Micropower 5V Charge Pump I
Q
= 12µA, Up to 50mA Output, V
IN
= 2V to 5V
LTC1517-5/LTC1517-3.3 Micropower 5V/3.3V Doubler Charge Pumps I
Q
= 6µA, Up to 20mA Output
LTC1522 Micropower 5V Doubler Charge Pump I
Q
= 6µA, Up to 20mA Output
LTC1555/LTC1556 SIM Card Interface Step-Up/Step-Down Charge Pump, V
IN
= 2.7V to 10V
LTC1682 Low Noise Doubler Charge Pump Output Noise = 60µV
RMS
, 2.5V to 5.5V Output
LTC1754-5 Micropower 5V Doubler Charge Pump I
Q
= 13µA, Up to 50mA Output, SOT-23 Package
LTC1755 Smart Card Interface Buck/Boost Charge Pump, I
Q
= 60µA, V
IN
= 2.7V to 6V
LTC3200 Constant Frequency Doubler Charge Pump Low Noise, 5V Output or Adjustable
RELATED PARTS
TYPICAL APPLICATIO
U
C4
1µF
LTC1751
C
+
C
V
OUT
FB
GND
C3
680pF
V
IN
SHDN
SS
2
65
1
4
3
7
8
C1
10µF
3V TO 4.5V
Li-Ion
BATTERY
82
1751 TA03
C2
10µF
82
UP TO 6 LEDS
82828282
V
SHDN
t
17ms
Current Mode White or Blue LED Driver with PWM Brightness Control
Dimensions in inches (millimeters) unless otherwise noted.
U
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
MSOP (MS8) 1100
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0.021 ± 0.006
(0.53 ± 0.015)
0° – 6° TYP
SEATING
PLANE
0.007
(0.18)
0.043
(1.10)
MAX
0.009 – 0.015
(0.22 – 0.38) 0.005 ± 0.002
(0.13 ± 0.05)
0.034
(0.86)
REF
0.0256
(0.65)
BSC 12
34
0.193 ± 0.006
(4.90 ± 0.15)
8765
0.118 ± 0.004*
(3.00 ± 0.102)
0.118 ± 0.004**
(3.00 ± 0.102)

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