PESD12VS2UT,215 Datasheet by NXP USA Inc.

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DATA SHEET
Product data sheet
Supersedes data of 2003 Aug 20 2004 Apr 15
DISCRETE SEMICONDUCTORS
PESDxS2UT series
Double ESD protection diodes in
SOT23 package
2S I/V |.\A 0019;: IA |.\l
2004 Apr 15 2
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
FEATURES
Uni-directional ESD protection of up to two lines
Max. peak pulse power: Ppp = 330 W at tp = 8/20 µs
Low clamping voltage: V(CL)R = 20 V at Ipp = 18 A
Ultra-low reverse leakage current: IRM < 700 nA
ESD protection > 23 kV
IEC 61000-4-2; level 4 (ESD)
IEC 61000-4-5 (surge); Ipp = 18 A at tp = 8/20 µs.
APPLICATIONS
Computers and peripherals
Communication systems
Audio and video equipment
High speed data lines
Parallel ports.
DESCRIPTION
Uni-directional double ESD protection diodes in a SOT23
plastic package. Designed to protect up to two
transmission or data lines from ElectroStatic Discharge
(ESD) damage.
MARKING
Note
1. * = p : made in Hong Kong.
* = t : made in Malaysia.
* = W : made in China.
QUICK REFERENCE DATA
PINNING
TYPE NUMBER MARKING CODE(1)
PESD3V3S2UT *U9
PESD5V2S2UT *U1
PESD12VS2UT *U2
PESD15VS2UT *U3
PESD24VS2UT *U4
SYMBOL PARAMETER VALUE UNIT
VRWM reverse stand-off
voltage 3.3, 5.2, 12, 15
and 24 V
Cddiode capacitance
VR = 0 V;
f = 1 MHz
207, 152, 38, 32
and 23 pF
number of
protected lines 2
PIN DESCRIPTION
1cathode 1
2cathode 2
3common anode
sym022
2
1
3
1
2
001aaa49
0
3
Fig.1 Simplified outline (SOT23) and symbol.
2004 Apr 15 3
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
ORDERING INFORMATION
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
Notes
1. Non-repetitive current pulse 8/20µ µs exponential decay waveform; see Fig.2.
2. Measured across either pins 1 and 3 or pins 2 and 3.
TYPE NUMBER PACKAGE
NAME DESCRIPTION VERSION
PESD3V3S2UT plastic surface mounted package; 3 leads SOT23
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Ppp peak pulse power 8/20 µs pulse; notes 1 and 2
PESD3V3S2UT 330 W
PESD5V2S2UT 260 W
PESD12VS2UT 180 W
PESD15VS2UT 160 W
PESD24VS2UT 160 W
Ipp peak pulse current 8/20 µs pulse; notes 1 and 2
PESD3V3S2UT 18 A
PESD5V2S2UT 15 A
PESD12VS2UT 5 A
PESD15VS2UT 5 A
PESD24VS2UT 3 A
Tjjunction temperature 150 °C
Tamb operating ambient temperature 65 +150 °C
Tstg storage temperature 65 +150 °C
2004 Apr 15 4
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
ESD maximum ratings
Notes
1. Device stressed with ten non-repetitive ElectroStatic Discharge (ESD) pulses; see Fig.3.
2. Measured across either pins 1 and 3 or pins 2 and 3.
SYMBOL PARAMETER CONDITIONS VALUE UNIT
ESD electrostatic discharge
capability IEC 61000-4-2 (contact discharge);
notes 1 and 2
PESD3V3S2UT 30 kV
PESD5V2S2UT 30 kV
PESD12VS2UT 30 kV
PESD15VS2UT 30 kV
PESD24VS2UT 23 kV
HBM MIL-Std 883
PESDxS2UT series 10 kV
ESD standards compliance
ESD STANDARD CONDITIONS
IEC 61000-4-2; level 4 (ESD); see Fig.3 >15 kV (air); > 8 kV (contact)
HBM MIL-Std 883; class 3 >4 kV
handbook, halfpage
010
et
20 t (µs)
Ipp
(%)
40
120
0
40
80
30
MLE218
100 % Ipp; 8 µs
50 % Ipp; 20 µs
Fig.2 8/20 µs pulse waveform according to
IEC 61000-4-5.
001aaa19
1
Ipp
1
00 %
90 %
t
30 ns
60 ns
10 %
tr = 0.7 to 1 ns
Fig.3 ElectroStatic Discharge (ESD) pulse
waveform according to IEC 61000-4-2.
2004 Apr 15 5
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
ELECTRICAL CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VRWM reverse stand-off voltage
PESD3V3S2UT − − 3.3 V
PESD5V2S2UT − − 5.2 V
PESD12VS2UT − − 12 V
PESD15VS2UT − − 15 V
PESD24VS2UT − − 24 V
IRM reverse leakage current
PESD3V3S2UT VRWM = 3.3 V 0.7 2µA
PESD5V2S2UT VRWM = 5.2 V 0.15 1µA
PESD12VS2UT VRWM = 12 V <0.02 1µA
PESD15VS2UT VRWM = 15 V <0.02 1µA
PESD24VS2UT VRWM = 24 V <0.02 1µA
VBR breakdown voltage IZ = 5 mA
PESD3V3S2UT 5.2 5.6 6.0 V
PESD5V2S2UT 6.4 6.8 7.2 V
PESD12VS2UT 14.7 15.0 15.3 V
PESD15VS2UT 17.6 18.0 18.4 V
PESD24VS2UT 26.5 27.0 27.5 V
Cddiode capacitance f = 1 MHz; VR = 0 V
PESD3V3S2UT 207 300 pF
PESD5V2S2UT 152 200 pF
PESD12VS2UT 38 75 pF
PESD15VS2UT 32 70 pF
PESD24VS2UT 23 50 pF
V(CL)R clamping voltage notes 1 and 2
PESD3V3S2UT Ipp = 1 A − − 7 V
Ipp = 18 A − − 20 V
PESD5V2S2UT Ipp = 1 A − − 9 V
Ipp = 15 A − − 20 V
PESD12VS2UT Ipp = 1 A − − 19 V
Ipp = 5 A − − 35 V
PESD15VS2UT Ipp = 1 A − − 23 V
Ipp = 5 A − − 40 V
PESD24VS2UT Ipp = 1 A − − 36 V
Ipp = 3 A − − 70 V
2004 Apr 15 6
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
Notes
1. Non-repetitive current pulse 8/20 µs exponential decay waveform; see Fig.2.
2. Measured either across pins 1 and 3 or pins 2 and 3.
Rdiff differential resistance
PESD3V3S2UT IR = 1 mA − − 400
PESD5V2S2UT IR = 1 mA − − 80
PESD12VS2UT IR = 1 mA − − 200
PESD15VS2UT IR = 1 mA − − 225
PESD24VS2UT IR = 0.5 mA − − 300
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
GRAPHICAL DATA
103
102
104
Ppp
(W)
10
tp (µs)
110
4
103
10 102
(1)
(2)
Fig.4 Peak pulse power dissipation as a function
of pulse time; typical values.
Tamb = 25 °C.
tp = 8/20 µs exponential decay waveform; see Fig.2.
(1) PESD3V3S2UT and PESD5V2S2UT.
(2) PESD12VS2UT, PESD15VS2UT, PESD24VS2UT
Tj (°C)
0 20015050 100
001aaa193
0.4
0.8
1.2
PPP
0
PPP(25°C)
Fig.5 Relative variation of peak pulse power as a
function of junction temperature; typical
values.
2004 Apr 15 7
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
VR (V)
054231
120
160
80
200
240
Cd
(pF)
40
(1)
(2)
Fig.6 Diode capacitance as a function of reverse
voltage; typical values.
Tamb = 25 °C; f = 1 MHz.
(1) PESD3V3S2UT; VRWM = 3.3 V.
(2) PESD5V2S2UT; VRWM = 5 V.
VR (V)
0252010 155
001aaa149
20
30
10
40
50
Cd
(pF)
0
(1)
(3)
(2)
Fig.7 Diode capacitance as a function of reverse
voltage; typical values.
Tamb = 25 °C; f = 1 MHz.
(1) PESD12VS2UT; VRWM = 12 V.
(2) PESD15VS2UT; VRWM = 15 V.
(3) PESD24VS2UT; VRWM = 24 V.
2004 Apr 15 8
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
001aaa270
1
10
101
Tj (°C)
100 15010005050
IR
IR(25˚C)
(1)
Fig.8 Relative variation of reverse leakage
current as a function of junction
temperature; typical values.
IR is less than 10 nA at 150 °C for:
PESD12V52UT; VRWM = 12 V.
PESD15VS2UT; VRWM = 15 V.
PESD24VS2UT; VRWM = 24 V.
(1) PESD3V3S2UT; VRWM = 3.3 V.
PESD5V2S2UT; VRWM = 5 V.
Ilj—o/ No|e 1 \ECSIODIHVZ nelwork 02 = 150 pF R2 = 330 n r7 D u T PEsstzuT ummsz 2004 Apr 15
2004 Apr 15 9
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
001aaa49
2
450
50
Note 1: IEC61000-4-2 network
CZ = 150 pF; RZ = 330
D.U.T.: PESDxS2UT
RG 223/U
50 coax
RZ
CZ
ESD TESTER 4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
vertical scale = 200 V/div
horizontal scale = 50 ns/div vertical scale = 20 V/div
horizontal scale = 50 ns/div
vertical scale = 200 V/div
horizontal scale = 50 ns/div vertical scale = 10 V/div
horizontal scale = 50 ns/div
G
ND
GND
GND
GND
GND
GND
GND
unclamped +1 kV ESD voltage waveform
(IEC61000-4-2 network) clamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
G
ND
unclamped 1 kV ESD voltage waveform
(IEC61000-4-2 network) clamped 1 kV ESD voltage waveform
(IEC61000-4-2 network)
note 1
PESD24VS2UT
PESD15VS2UT
PESD12VS2UT
PESD5V2S2UT
PESD3V3S2UT
Fig.9 ESD clamping test set-up and waveforms.
N _ ,__ V1 2: A N ground unidirectional prolediun oi |wu lines Circuit board layout and protection device placement Circuit board layout is critical forthe suppression of ESD, Electri lollowmg guidelines are recommended: 0 Place the PESDXSZUT as close as possible to the input termi o The path length between the PESDXSZUT and the protected l 0 Keep parallel signal paths to a minimum. 0 Avoid running protected conductors in parallel with unprotecte o Minimize all printed-circuit board conductive loops including po 0 Minimize the length pl transient return paths to ground. 0 Avoid using shared return paths to a common ground point. 0 Ground planes should be used whenever possible. For multila 2004 Apr 15 10
2004 Apr 15 10
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
APPLICATION INFORMATION
The PESDxS2UT series is designed for uni-directional protection for up to two lines against damage caused by
ElectroStatic Discharge (ESD) and surge pulses. The PESDxS2UT series may be used on lines where the signal
polarities are below ground. PESDxS2UT series provide a surge capability of up to 330 W (Ppp) per line for an 8/20 µs
waveform.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The
following guidelines are recommended:
Place the PESDxS2UT as close as possible to the input terminal or connector.
The path length between the PESDxS2UT and the protected line should be minimized.
Keep parallel signal paths to a minimum.
Avoid running protected conductors in parallel with unprotected conductors.
Minimize all printed-circuit board conductive loops including power and ground loops.
Minimize the length of transient return paths to ground.
Avoid using shared return paths to a common ground point.
Ground planes should be used whenever possible. For multilayer printed-circuit boards use ground vias.
001aaa49
1
PESDxS2UT
line 1 to be protected
unidirectional protection
of two lines bidirectional protection
of one line
line 2 to be protected
ground
PESDxS2UT
line 1 to be protecte
d
ground
Fig.10 Typical application: ESD protection of data lines.
o 1 2mm MAME scaxe DIMENSIONS (mm are me original dimensions) A. UNIT A max. up c D E e 91 RE LP a v w H 045 015 30 14 25 0A5 055 mm 09 01 038 009 25 12 ‘9 095 21 015 045 02 0‘ REFERENCES OUTLINE EUROPEAN “55'0" IEc JEDEC JEITA PROJECYION 'SSUE DATE M sons TOVEQSAB a @ 06703716 2004 Apr 15 1 1
2004 Apr 15 11
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
PACKAGE OUTLINE
UNIT A
1
max. b
p
cDE e
1
H
E
L
p
Qwv
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
04-11-04
06-03-16
IEC JEDEC JEITA
mm 0.1 0.48
0.38 0.15
0.09 3.0
2.8 1.4
1.2 0.95
e
1.9 2.5
2.1 0.55
0.45 0.1
0.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
SOT23 TO-236AB
bp
D
e1
e
A
A1
Lp
Q
detail X
HE
E
w
M
v
M
A
B
AB
0 1 2 mm
scale
A
1.1
0.9
c
X
12
3
Plastic surface-mounted package; 3 leads SOT2
3
2004 Apr 15 12
NXP Semiconductors Product data sheet
Double ESD protection diodes in SOT23
package PESDxS2UT series
DATA SHEET STATUS
Notes
1. Please consult the most recently issued document before initiating or completing a design.
2. The product status of device(s) described in this document may have changed since this document was published
and may differ in case of multiple devices. The latest product status information is available on the Internet at
URL http://www.nxp.com.
DOCUMENT
STATUS(1) PRODUCT
STATUS(2) DEFINITION
Objective data sheet Development This document contains data from the objective specification for product
development.
Preliminary data sheet Qualification This document contains data from the preliminary specification.
Product data sheet Production This document contains the product specification.
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Limiting values Stress above one or more limiting
values (as defined in the Absolute Maximum Ratings
System of IEC 60134) may cause permanent damage to
the device. Limiting values are stress ratings only and
operation of the device at these or any other conditions
above those given in the Characteristics sections of this
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extended periods may affect device reliability.
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extract of the product data given in the Limiting values and
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not complete, exhaustive or legally binding.
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Printed in The Netherlands R76/03/pp13 Date of release: 2004 Apr 15 Document order number: 9397 750 12823

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