NUP4202W1 Datasheet by ON Semiconductor

View All Related Products | Download PDF Datasheet
0N Semiconductnr® www.0nsemi.com LOW CAPA RGE PR ARRAY TS PEAK 6 VOLTS I'II'II'I I20 L|L|
© Semiconductor Components Industries, LLC, 2009
October, 2017 Rev. 4
1Publication Order Number:
NUP4202W1/D
NUP4202W1
ESD Protection Diode, Low
Clamping Voltage
The NUP4202W1 surge protection is designed to protect high speed
data lines from ESD, EFT, and lightning.
Features
Low Clamping Voltage
StandOff Voltage: 5 V
Low Leakage
Protection for the Following IEC Standards:
IEC 6100042 Level 4 ESD Protection
UL Flammability Rating of 94 V0
This is a PbFree Device
Typical Applications
High Speed Communication Line Protection
USB 1.1 and 2.0 Power and Data Line Protection
Digital Video Interface (DVI) and HDMI
Monitors and Flat Panel Displays
MP3
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating Symbol Value Unit
Peak Power Dissipation
8 x 20 mS @ TA = 25°C (Note 1)
Ppk 500 W
Operating Junction Temperature Range TJ40 to +125 °C
Storage Temperature Range Tstg 55 to +150 °C
Lead Solder Temperature
Maximum (10 Seconds)
TL260 °C
Human Body Model (HBM)
Machine Model (MM)
IEC 6100042 Air (ESD)
IEC 6100042 Contact (ESD)
ESD 16000
400
20000
20000
V
IEC 6100044 (5/50 ns) EFT 40 A
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Nonrepetitive current pulse per Figure 5 (Pin 5 to Pin 2).
See Application Note AND8308/D for further description of
survivability specs.
SC88 LOW CAPACITANCE
DIODE SURGE PROTECTION
ARRAY
500 WATTS PEAK POWER
6 VOLTS
MARKING DIAGRAM
Device Package Shipping
ORDERING INFORMATION
SC88
CASE 419B
PLASTIC
PIN CONFIGURATION
AND SCHEMATIC
6 I/O
5 VP
4 I/O
I/O 1
VN 2
I/O 3
www.onsemi.com
NUP4202W1T2G SC88
(PbFree)
3000/Tape & Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1
63 MG
G
63 = Specific Device Code
M = Date Code
G= PbFree Package
(Note: Microdot may be in either location)
1
6
Tek Run: 2.505515 I Sample T TeK Run: 2 socsxs Sample m T I um mom M 20.0ns Chl \ 23.8V www onsem' com M 20.0hs cm '\
NUP4202W1
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol Parameter
IPP Maximum Reverse Peak Pulse Current
VCClamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IRMaximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
ITTest Current
IFForward Current
VFForward Voltage @ IF
Ppk Peak Power Dissipation
CCapacitance @ VR = 0 and f = 1.0 MHz
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
IPP
IF
V
I
IR
IT
VRWM
VCVBR
VF
UniDirectional
ELECTRICAL CHARACTERISTICS (TJ=25°C unless otherwise specified)
Parameter Symbol Conditions Min Typ Max Unit
Reverse Working Voltage VRWM (Note 2) 5.0 V
Breakdown Voltage VBR IT = 1 mA, (Note 3) 6.0 V
Reverse Leakage Current IRVRWM = 5 V 5.0 mA
Clamping Voltage VCIPP = 5 A (Note 4) 8.5 12.5 V
Clamping Voltage VCIPP = 8 A (Note 4) 8.9 20 V
Maximum Peak Pulse Current IPP 8x20 ms Waveform (Note 4) 28 A
Junction Capacitance CJVR = 0 V, f = 1 MHz between I/O Pins and GND 3.0 5.0 pF
Junction Capacitance CJVR = 0 V, f = 1 MHz between I/O Pins 1.5 3.0 pF
Clamping Voltage VC@ IPP = 1 A (Notes 5 and 6) 14.5 V
Clamping Voltage VCPer IEC 6100042 (Note 7) Figure 1 and 2 V
2. Rurge protection devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater
than the DC or continuous peak operating voltage level.
3. VBR is measured at pulse test current IT
.
4. Nonrepetitive current pulse per Figure 5 (Pin 5 to Pin 2).
5. Nonrepetitive current pulse per Figure 5 (Any I/O Pins).
6. Surge current waveform per Figure 5.
7. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC6100042
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC6100042
:IEIEIE' :IEIEIE' nun El a0} 0 a no El U0 El OOEI 0 El
NUP4202W1
www.onsemi.com
3
IEC 6100042 Spec.
Level
Test Volt-
age (kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1 2 7.5 4 2
2 4 15 8 4
3 6 22.5 12 6
4 8 30 16 8
Ipeak
90%
10%
IEC6100042 Waveform
100%
I @ 30 ns
I @ 60 ns
tP = 0.7 ns to 1 ns
Figure 3. IEC6100042 Spec
Figure 4. Diagram of ESD Test Setup
50 W
50 W
Cable
Oscilloscope
ESD Gun
The following is taken from Application Note
AND8308/D Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC6100042 waveform. Since the
IEC6100042 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
Figure 5. 8 X 20 ms Pulse Waveform
100
90
80
70
60
50
40
30
20
10
0020406080
t, TIME (ms)
% OF PEAK PULSE CURRENT
tP
tr
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
PEAK VALUE IRSM @ 8 ms
HALF VALUE IRSM/2 @ 20 ms
l/O-Ground www onsem' com
NUP4202W1
www.onsemi.com
4
TYPICAL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
Figure 6. Pulse Derating Curve
100
90
80
70
60
50
40
30
20
10
00 25 50 75 100 125 150 175 200
TA, AMBIENT TEMPERATURE (°C)
Figure 7. Junction Capacitance vs Reverse Voltage
5.0
2.5
0.0 01
VBR, REVERSE VOLTAGE (V)
JUNCTION CAPACITANCE (pF)
2345
I/O lines
I/OGround
PEAK POWER DISSIPATION (%)
4.5
2.0
4.0
1.5
3.5
1.0
3.0
0.5
Figure 8. Clamping Voltage vs. Peak Pulse Current
(8 x 20 ms Waveform)
20
10
0010
PEAK PULSE CURRENT (A)
CLAMPING VOLTAGE (V)
20 30 40 50
18
8
16
6
14
4
12
2
capacitance steering diodes and a surge protection diode integrated in a ~ingle package (SC—xx). if a tran -'ent condition occur. , the steering diodes will drive the transient to the positive rail of the power supply or to ground. The surge protection device protects the power line against overvoltage conditions to avoid damage to the power supply and any downstream components. NUP4202W1 Configuration Options The NUP4202W1 is able to protect up to fottr data lines against transient overvoltage conditions by driving them to a fixed reference point for clamping purpo, . The steering diodes will be forward biased whenever the voltage on the protected litre exceeds the reference voltage (Vt or Vce + Vi). The diodes will force the transient current to bypass the sen, ive circuit. Data lines re connected at pins 1, 3, 4 and (r. The negative reference , connected at pin 2. This pin must be connected directly to ground by using a ground plane to minimize the PCB's ground inductanc It is very important to reduce the PCB trace lengths as much as possible to minimize p inductances. Option 1 Protection of four data lines and the power supply rising vcc as references I/O t I/O 2 l TE E J_ E H E 0 Vcc 3 E: E I/O 3 _0 I/O 4 For this configuration, connect pin 5 directly to the positive supply rail (vcc), the data lines are referenced to the supply voltage The internal surge protection diode prevents overvoltagc on the supply rail. Biasing of the steering diodes reduces their Capacitance www.cnsemi.com 5 |:||:|L—_| |:||:|L—_|
NUP4202W1
www.onsemi.com
5
APPLICATIONS INFORMATION
The new NUP4202W1 is a low capacitance surge
protection diode array designed to protect sensitive
electronics such as communications systems, computers,
and computer peripherals against damage due to ESD events
or transient overvoltage conditions. Because of its low
capacitance, it can be used in high speed I/O data lines. The
integrated design of the NUP4202W1 offers surge rated, low
capacitance steering diodes and a surge protection diode
integrated in a single package (SC88). If a transient
condition occurs, the steering diodes will drive the transient
to the positive rail of the power supply or to ground. The
surge protection device protects the power line against
overvoltage conditions to avoid damage to the power supply
and any downstream components.
NUP4202W1 Configuration Options
The NUP4202W1 is able to protect up to four data lines
against transient overvoltage conditions by driving them to
a fixed reference point for clamping purposes. The steering
diodes will be forward biased whenever the voltage on the
protected line exceeds the reference voltage (Vf or VCC +
Vf). The diodes will force the transient current to bypass the
sensitive circuit.
Data lines are connected at pins 1, 3, 4 and 6. The negative
reference is connected at pin 2. This pin must be connected
directly to ground by using a ground plane to minimize the
PCB’s ground inductance. It is very important to reduce the
PCB trace lengths as much as possible to minimize parasitic
inductances.
Option 1
Protection of four data lines and the power supply using
VCC as reference.
6
5
4
1
2
3
I/O 1
I/O 2
I/O 3
I/O 4
VCC
For this configuration, connect pin 5 directly to the
positive supply rail (VCC), the data lines are referenced to
the supply voltage. The internal surge protection diode
prevents overvoltage on the supply rail. Biasing of the
steering diodes reduces their capacitance.
Option 2
Protection of four data lines with bias and power supply
isolation resistor.
VCC
10 k
6
5
4
1
2
3
I/O 1
I/O 2
I/O 3
I/O 4
The NUP4202W1 can be isolated from the power supply
by connecting a series resistor between pin 5 and VCC. A
10 kW resistor is recommended for this application. This
will maintain a bias on the internal surge protection and
steering diodes, reducing their capacitance.
Option 3
Protection of four data lines using the internal surge
protection diode as reference.
6
5
4
1
2
3
I/O 1
I/O 2
I/O 3
I/O 4
NC
In applications lacking a positive supply reference or
those cases in which a fully isolated power supply is
required, the internal surge protection can be used as the
reference. For these applications, pin 5 is not connected. In
this configuration, the steering diodes will conduct
whenever the voltage on the protected line exceeds the
working voltage of the surge protection plus one diode drop
(Vc = Vf + VRWM).
ESD Protection of Power Supply Lines
When using diodes for data line protection, referencing to
a supply rail provides advantages. Biasing the diodes
reduces their capacitance and minimizes signal distortion.
Implementing this topology with discrete devices does have
disadvantages. This configuration is shown below:
www.0nsem iiii
NUP4202W1
www.onsemi.com
6
VCC
D1
D2
Data Line
IESDpos
IESDneg
VF + VCC
VF
IESDpos
IESDneg
Power
Supply
Protected
Device
Looking at the figure above, it can be seen that when a
positive ESD condition occurs, diode D1 will be forward
biased while diode D2 will be forward biased when a
negative ESD condition occurs. For slower transient
conditions, this system may be approximated as follows:
For positive pulse conditions:
Vc = VCC + VfD1
For negative pulse conditions:
Vc = VfD2
ESD events can have rise times on the order of some
number of nanoseconds. Under these conditions, the effect
of parasitic inductance must be considered. A pictorial
representation of this is shown below.
VCC
D1
D2
Data Line
IESDpos
IESDneg
VC = VCC + Vf + (L diESD/dt)
IESDpos
IESDneg
Power
Supply
Protected
Device
VC = Vf (L diESD/dt)
An approximation of the clamping voltage for these fast
transients would be:
For positive pulse conditions:
Vc = VCC + Vf + (L diESD/dt)
For negative pulse conditions:
Vc = Vf – (L diESD/dt)
As shown in the formulas, the clamping voltage (Vc) not
only depends on the Vf of the steering diodes but also on the
L diESD/dt factor. A relatively small trace inductance can
result in hundreds of volts appearing on the supply rail. This
endangers both the power supply and anything attached to
that rail. This highlights the importance of good board
layout. Taking care to minimize the effects of parasitic
inductance will provide significant benefits in transient
immunity.
Even with good board layout, some disadvantages are still
present when discrete diodes are used to suppress ESD
events across datalines and the supply rail. Discrete diodes
with good transient power capability will have larger die and
therefore higher capacitance. This capacitance becomes
problematic as transmission frequencies increase. Reducing
capacitance generally requires reducing die size. These
small die will have higher forward voltage characteristics at
typical ESD transient current levels. This voltage combined
with the smaller die can result in device failure.
The ON Semiconductor NUP4202W1 was developed to
overcome the disadvantages encountered when using
discrete diodes for ESD protection. This device integrates a
surge protection diode within a network of steering diodes.
D1
D2
D3
D4
D5
D6
D7
D8
0
Figure 9. NUP4202W1 Equivalent Circuit
During an ESD condition, the ESD current will be driven
to ground through the surge protection diode as shown
below.
VCC
D1
D2
Data Line
IESDpos
Power
Supply
Protected
Device
The resulting clamping voltage on the protected IC will
be:
Vc = VF + VRWM.
The clamping voltage of the surge protection diode is
provided in Figure 8 and depends on the magnitude of the
ESD current. The steering diodes are fast switching devices
with unique forward voltage and low capacitance
characteristics.
NUP4202W1
www.onsemi.com
7
TYPICAL APPLICATIONS
UPSTREAM
USB PORT
VBUS
VBUS
VBUS VBUS
VBUS
VBUS
VBUS
VBUS
DOWNSTREAM
USB PORT
DOWNSTREAM
USB PORT
D
D+
D
D+
GND
GND
D
D+
GND
USB
Controller
RT
RT
RT
RT
CT
CT
CT
CT
NUP2202W1
NUP4202W1
Figure 10. ESD Protection for USB Port
Figure 11. Protection for Ethernet 10/100 (Differential Mode)
PHY
Ethernet
(10/100)
Coupling
Transformers
NUP4202W1
RJ45
Connector
N/C N/C
TX+
TX
RX+
RX
TX+
TX
RX+
RX
GND
VCC
www.0nsem iiii
NUP4202W1
www.onsemi.com
8
T1/E1
TRANCEIVER
RTIP
RRING
TRING
TTIP
R1
R2 R3
R4
R5
T1
T2
NUP4202W1
VCC
Figure 12. TI/E1 Interface Protection
um A1 A3 a um 02‘ use new uuaa amz c um um (:25 new 0005 (mm D H30 200 22a um um cuss H; \ (m3; u a 2 Mama,“ at gamma, Cnmpnnems In wwwmemum g memmmggm
NUP4202W1
www.onsemi.com
9
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419B01 OBSOLETE, NEW STANDARD 419B02.
E0.2 (0.008) MM
123
D
e
A1
A
A3
C
L
654
E
b6 PL
SC88/SC706/SOT363
CASE 419B02
ISSUE W
DIM MIN NOM MAX
MILLIMETERS
A0.80 0.95 1.10
A1 0.00 0.05 0.10
A3
b0.10 0.21 0.30
C0.10 0.14 0.25
D1.80 2.00 2.20
0.031 0.037 0.043
0.000 0.002 0.004
0.004 0.008 0.012
0.004 0.005 0.010
0.070 0.078 0.086
MIN NOM MAX
INCHES
0.20 REF 0.008 REF
HE
HE
E1.15 1.25 1.35
e0.65 BSC
L0.10 0.20 0.30
2.00 2.10 2.20
0.045 0.049 0.053
0.026 BSC
0.004 0.008 0.012
0.078 0.082 0.086
ǒmm
inchesǓ
SCALE 20:1
0.65
0.025
0.65
0.025
0.50
0.0197
0.40
0.0157
1.9
0.0748
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
SC88/SC706/SOT363
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 8002829855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81358171050
NUP4202W1/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 3036752175 or 8003443860 Toll Free USA/Canada
Fax: 3036752176 or 8003443867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative

Products related to this Datasheet

TVS DIODE 5V 14.5V SC88
TVS DIODE 5V 14.5V SC88
TVS DIODE 5V 14.5V SC88