Datenblatt für AUIRS211(0,3)S von Infineon Technologies

International 122R Rectitier Up to 500 V or 600V VDD H IN SD LIN Vss Vcc TO LOAD (Refel to Lead Assignmenls (or eoneel pin Conllgurallon). This/These dlagram(s) show eteclncal connecllorls only. Please relena cur Appilcallnn Nates and Deslgn Tips for proper mull board layout.
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Dec. 13, 2009
Automotive Grade
AUIRS211(0,3)S
HIGH- AND LOW-SIDE DRIVER
Features
• Floating channel designed for bootstrap operation
• Fully operational to +500 V or +600 V
• Tolerant to negative transient voltage – dV/dt immune
• Gate drive supply range from 10 V to 20 V
• Undervoltage lockout for both channels
• 3.3 V input logic compatible
• Separate logic supply range from 3.3 V to 20 V
• Logic and power ground ±5 V offset
• CMOS Schmitt-triggered inputs with pull-down
• Cycle by cycle edge-triggered shutdown logic
• Matched propagation delay for both channels
• Output in phase with inputs
• Leadfree, roHS Compliant
• Automotive qualified*
Typical Applications
• Hybrid electric vehicles
• Air condition drives, pumps, fans
• Automotive general purpose dual LS/HS driver
• Automotive motor drives
• Automotive DC/DC converters
• Automotive injection control
Product Summary
Topology 2 channels
AUIRS2110 500 V max
VOFFSET
AUIRS2113 600 V max
VOUT 10 V – 20 V
Io+ & I o- (typical) 2.5 A / 2.5 A
tON & tOFF (typical) 140 ns & 120 ns
Delay Matching (max.) 35 ns max
Package Option
16-Lead SOIC
AUIRS211(0,3)S
Typical Connection Diagram
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Table of Contents Page
Description 3
Qualification Information 4
Absolute Maximum Ratings 5
Recommended Operating Conditions 5
Static Electrical Characteristics 6
Dynamic Electrical Characteristics 6
Functional Block Diagram 7
Input/Output Pin Equivalent Circuit Diagram 8
Lead Definitions 9
Lead Assignments 9
Application Information and Additional Details 10-11
Parameter Temperature Trends 12-14
Package Details 15
Tape and Reel Details 16
Part Marking Information 17
Ordering Information 18
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Description
The AUIRS211(0,3)S are high voltage, high speed power MOSFET and IGBT drivers with independent high and
low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized
monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic.
The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction.
Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used
to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 500 V or 600 V.
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Qualification Information†
Automotive
(per AEC-Q100††)
Qualification Level Comments: This family of ICs has passed an Automotive
qualification. IR’s Industrial and Consumer qualification level
is granted by extension of the higher Automotive level.
Moisture Sensitivity Level SOIC16W MSL3††† 260°C
(per IPC/JEDEC J-STD-020)
Machine Model Class M2 (Pass +/-200V)
(per AEC-Q100-003)
Human Body Model Class H1B (Pass +/-1000V)
(per AEC-Q100-002)
ESD
Charged Device Model Class C4 (Pass +/-1000V)
(per AEC-Q100-011)
IC Latch-Up Test Class II, Level A
(per AEC-Q100-004)
RoHS Compliant Yes
† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Exceptions to AEC-Q100 requirements are noted in the qualification report.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
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Recommended Operating Conditions
The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used within
the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15 V differential.
† Logic operational for VS of -4 V to +500 V. Logic state held for VS of -4 V to – VBS.
(Please refer to the Design Tip DT97 -3 for more details).
†† When VDD < 5 V, the minimum VSS offset is limited to –VDD.
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol Definition Min. Max. Units
(AUIRS2110) -0.3 520 (†)
VB High-side floating supply voltage (AUIRS2113) -0.3 620 (†)
VS High-side floating supply offset voltage VB - 20 VB + 0.3
VHO High-side floating output voltage VS - 0.3 VB + 0.3
VCC Low-side fixed supply voltage -0.3 20
VLO Low-side output voltage -0.3 VCC + 0.3
VDD Logic supply voltage -0.3 VSS + 20 (†)
VSS Logic supply offset voltage VCC - 20 VCC + 0.3
VIN Logic input voltage (HIN, LIN & SD) VSS -0.3 VDD + 0.3
V
dVS/dt Allowable offset supply voltage transient (Fig. 2) — 50 V/ns
PD Package power dissipation @ TA ≤ 25°C — 1.25 W
RthJA Thermal resistance, junction to ambient — 100 °C/W
TJ Junction temperature — 150
TS Storage temperature -55 150
TL Lead temperature (soldering, 10 seconds) — 300
°C
† All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply.
Symbol Definition Min. Max. Units
VB High-side floating supply absolute voltage VS +10 VS +20
(AUIRS2110) † 500
VS High-side floating supply offset voltage (AUIRS2113) † 600
VHO High-side floating output voltage VS V
B
VCC Low-side fixed supply voltage 10 20
VLO Low-side output voltage 0 VCC
VDD Logic supply voltage VSS + 3 VSS + 20
VSS Logic ground offset voltage -5 (††) 5
VIN Logic input voltage (HIN, LIN & SD) VSS V
DD
V
TA Ambient temperature -40 125 °C
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Static Electrical Characteristics
Unless otherwise noted, these specifications apply for an operating junction temperature range of -40°C ≤ Tj ≤
125°C with bias conditions of VBIAS (VCC, VBS, VDD ) = 15 V, VSS = COM. The VIL, V
TH and IIN parameters are
referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO, and IO parameters are
referenced to COM and are applicable to the respective output leads: HO or LO.
(†) Guaranteed by design
Dynamic Electrical Characteristics
Unless otherwise noted, these specifications apply for an operating junction temperature range of -40°C ≤ Tj ≤
125°C with bias conditions of VBIAS (VCC, VBS, VDD ) = 15 V, CL = 1000 pF, and VSS = COM. The dynamic electrical
characteristics are measured using the test circuit shown in Fig. 3.
Note: Please refer to figures in Parameter Temperature Trends section
Symbol Definition Min Typ Max Units Test Conditions
VIH Logic “1” input voltage 9.5 — —
VIL Logic “0” input voltage — — 6.0
VOH High level output voltage, VBIAS - VO — — 1.4 IO = 0 A
VOL Low level output voltage, VO — — 0.15
V
IO = 20 mA
ILK Offset supply leakage current — — 50 VB = VS = 500
V/600 V
IQBS Quiescent VBS supply current — 70 130
IQCC Quiescent VCC supply current — 125 230
IQDD Quiescent VDD supply current — 5 30
VIN = 0 V or VDD
IIN+ Logic “1” input bias current — 20 40 VIN = VDD
IIN- Logic “0” input bias current — — 5.0
µA
VIN = 0 V
VBSUV+ V
BS supply undervoltage positive going threshold 7.5 8.6 9.7
VBSUV- VBS supply undervoltage negative going threshold 7.0 8.2 9.4
VCCUV+ V
CC supply undervoltage positive going threshold 7.4 8.5 9.6
VCCUV- V
CC supply undervoltage negative going threshold 7.0 8.2 9.4
V
IO+ Output high short circuit pulsed current (†) 2.0 2.5 —
VO = 0 V,
VIN = VDD
PW ≤ 10 us
IO- Output low short circuit pulsed current(†) 2.0 2.5 —
A VO = 15 V,
VIN = 0 V
PW ≤ 10 us
Symbol Definition Min Typ Max Units Test Conditions
ton Turn-on propagation delay — 140 230 VS = 0 V
toff Turn-off propagation delay — 120 210
tsd Shutdown propagation delay — 125 220 VS = 500 V/600 V
t
r Turn-on rise time — 25 40
t
f
Turn-off fall time — 15 30
MT Delay matching, HS & LS turn on/off — — 35
ns
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Functional Block Diagram
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Input/Output Pin Equivalent Circuit Diagrams
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Lead Definitions
Pin Symbol Description
1 LO Low-side gate drive output
2 COM Low-side return
3 VCC Low-side supply
4 NC Not connected
5 NC Not connected
6 VS High-side floating supply return
7 VB High-side floating supply
8 HO High-side gate drive output
9 NC Not connected
10 NC Not connected
11 VDD Logic supply
12 HIN Logic input for high-side gate driver output (HO), in phase
13 SD Logic input for shutdown
14 LIN Logic input for low-side gate driver output (LO), in phase
15 VSS Logic ground
16 NC Not connected
Lead Assignments
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Application Information and Additional Details
Figure 1: Input/Output Timing Diagram
Fi
ure 2: Floatin
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Su
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l
y
Volta
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Fi
g
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Time Test Circuit
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Figure 4: Switching Time Waveform Definitions
Fi
g
ure 6: Dela
y
Matchin
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Waveform Definitions
Fi
g
ure 5: Shutdown Waveform Definitions
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Parameter Temperature Trends
Figures illustrated in this chapter provide information on the experimental performance of the AUIRS211(0,3)S
HVIC. The line plotted in each figure is generated from actual lab data. A large number of individual samples were
tested at three temperatures (-40 ºC, 25 ºC, and 125 ºC) in order to generate the experimental curve. The line
consists of three data points (one data point at each of the tested temperatures) that have been connected
together to illustrate the understood trend. The individual data points on the Typ. curve were determined by
calculating the averaged experimental value of the parameter (for a given temperature).
100
140
180
220
260
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Turn-on Propagation Delay (ns)
Typ.
Max.
Min.
Figure 7. Turn-On Time vs. Temperature
90
115
140
165
190
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Turn-off Propagation Delay (ns
)
Typ.
Max.
Min.
Figure 8. Turn-Off Time vs. Temperature
90
115
140
165
190
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
SD Propagation Delay (ns)
Typ.
Max.
Min.
Figure 9. Shutdown Time vs. Temperature
20
22
24
26
28
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Torn-On Rise Time (ns)
Typ.
Max.
Min.
Figure 10. Turn-On Rise Time vs. Temperature
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13
14
15
16
17
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Turn-Off fall Time (ns)
-
Typ.
Max.
Min.
Figure 11. Turn-Off Fall Time vs. Temperature
0.0
0.5
1.0
1.5
2.0
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
High Level Output (V)
Typ.
Max.
Min.
Figure 12. High Level Output Voltage vs. Temperature (IO
= 0 mA)
45
50
55
60
65
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Low Level Output (mV)
Typ.
Max.
Min.
Figure 13. Low Level Output vs. Temperature
0
10
20
30
40
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Offset Supply Leakage Current (uA)
Typ.
Max.
Min.
Figure 14. Offset Supply Current vs. Temperature
55
65
75
85
95
-50 -25 0 25 50 75 100 125
Temperature (oC)
Quiescent VBS Supply Current (uA)
Typ.
Max.
Min.
Figure 15. VBS Supply Current vs. Temperature
100
125
150
175
200
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Quiescent V
CC
Supply Current (uA)
Typ.
Max.
Min.
Figure 16. VCC Supply Current vs. Temperature
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2.0
5.0
8.0
11.0
14.0
-50 -25 0 25 50 75 100 125
Temperature (oC)
Quiescent V Supply Current (uA)
Typ.
Max.
Min.
Figure 17. VDD Supply Current vs. Temperature
8.00
8.25
8.50
8.75
9.00
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V UV+ Threshold (V)
Typ.
Max.
Min.
Figure 18. VBS Undervoltage (+) vs. Temperature
7.0
7.5
8.0
8.5
9.0
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V UV- Threshold (V)
Typ.
Max.
Min.
Figure 19. VBS Undervoltage (-) vs. Temperature
8.0
8.3
8.5
8.8
9.0
-50-25 0 255075100125
Temperature (
o
C)
VCC UV+ Threshold (V)
Typ.
Max
Min.
Figure 20. VCC Undervoltage (+) vs. Temperature
7.0
7.5
8.0
8.5
9.0
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
CC
UV- Threshold (V)
Typ.
Max
Min.
Figure 21. VCC Undervoltage (-) vs. Temperature
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Package Details: SOIC16WB
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AUIRS211(0,3)S
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Tape and Reel Details: SOIC16WB
CARRIER TAPE DIMENSION FOR 16SOICN
Metric Imperial
Code Min Max Min Max
A 7.90 8.10 0.311 0.318
B 3.90 4.10 0.153 0.161
C 15.70 16.30 0.618 0.641
D 7.40 7.60 0.291 0.299
E 6.40 6.60 0.252 0.260
F 10.20 10.40 0.402 0.409
G 1.50 n/a 0.059 n/a
H 1.50 1.60 0.059 0.062
REEL DIMENSIONS FOR 16SOICN
Metric Imperial
Code Min Max Min Max
A 329.60 330.25 12.976 13.001
B 20.95 21.45 0.824 0.844
C 12.80 13.20 0.503 0.519
D 1.95 2.45 0.767 0.096
E 98.00 102.00 3.858 4.015
F n/a 22.40 n/a 0.881
G 18.50 21.10 0.728 0.830
H 16.40 18.40 0.645 0.724
E
F
A
C
D
G
A
BH
N
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DIMENSION IN MM
LOADED TAPE FEED DIRECTION
A
H
F
E
G
D
B
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Part Marking Information
AUIRSxxxxx
IR logo
AYWW ?
Part number
Date code
Pin 1
Identifier Lot Code
(Prod mode –
4 digit SPN code)
Assembly site code
Per SCOP 200-002
?XXXX
MARKING CODE
Lead Free Released
Non-Lead Free Released
?
P
Ordering Information
Standard Pack
Base Part Number Package Type Form Quantity
Complete Part Number
Tube/Bulk 25 AUIRS2110S
AUIRS2110S SOIC16W
Tape and Reel 1000 AUIRS2110STR
Tube/Bulk 25 AUIRS2113S
AUIRS2113S SOIC16W
Tape and Reel 1000 AUIRS2113STR
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IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries
(IR) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its
products and services at any time and to discontinue any product or services without notice. Part numbers
designated with the “AU” prefix follow automotive industry and / or customer specific requirements with regards to
product discontinuance and process change notification. All products are sold subject to IR’s terms and conditions
of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance
with IR’s standard warranty. Testing and other quality control techniques are used to the extent IR deems
necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their
products and applications using IR components. To minimize the risks with customer products and applications,
customers should provide adequate design and operating safeguards.
Reproduction of IR information in IR data books or data sheets is permissible only if reproduction is without
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this information with alterations is an unfair and deceptive business practice. IR is not responsible or liable for
such altered documentation. Information of third parties may be subject to additional restrictions.
Resale of IR products or serviced with statements different from or beyond the parameters stated by IR for that
product or service voids all express and any implied warranties for the associated IR product or service and is an
unfair and deceptive business practice. IR is not responsible or liable for any such statements.
IR products are not designed, intended, or authorized for use as components in systems intended for surgical
implant into the body, or in other applications intended to support or sustain life, or in any other application in which
the failure of the IR product could create a situation where personal injury or death may occur. Should Buyer
purchase or use IR products for any such unintended or unauthorized application, Buyer shall indemnify and hold
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claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim
of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that IR
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IR products are neither designed nor intended for use in automotive applications or environments unless the
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automotive applications, IR will not be responsible for any failure to meet such requirements.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
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