Datenblatt für AP2181,91 von Diodes Incorporated

AP2181/ AP2191 and ”g and I: ' :I E j I: :I E 3 (Top View) NC OUT OUT FLG MSOP-SEP ( Top View) OuT GND FLG $0125 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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AP2181/ AP2191
1.5A SINGLE CHANNEL CURRENT-LIMITED POWER SWITCH
Description
The AP2181 and AP2191 are integrated high-
side power switches
optimized for Universal Serial Bus (USB) and other hot-
swap
applications. The family of devices complies with USB 2.0 and
is
available with both polarities of Enable input. They offer current and
thermal limiting and short circuit protection as well as controlled rise
time and under-voltage lockout functionality. A 7ms
on the open-drain Flag output prevents false over-
current reporting
and does not require any external components.
All devices are available in SO-8, MSOP-8EP
, SOT25 and
U-DFN2018-6 packages.
Features
Single USB Port Power Switches
Over-Current and Thermal Protection
2.1A Accurate Current Limiting
Reverse Current Blocking
95m On-Resistance
Input Voltage Range: 2.7V – 5.5V
0.6ms Typical Rise Time
Very Low Shutdown Current: 1µA (max)
Fault Report (FLG) with Blanking Time (7ms typ)
ESD Protection: 4kV HBM, 300V MM
Active Low (AP2181) or Active High (AP2191) Enable
Ambient Temperature Range: -40°C to +85°C
SOT25, SO-8, MSOP-8EP (Exposed Pad), and U-DFN2018-6:
Available in “Green” Molding Compound (No Br, Sb)
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
UL Recognized, File Number E322375
IEC60950-1 CB Scheme Certified
Applications
Consumer Electronics – LCD TVs & Monitors, Game Machines
Communications – Set-Top-Boxes, GPS Systems,
Smartphones
Computing – Laptops, Desktops, Servers, Printers, Docking
Stations, HUBs
Pin Assignments
SO-8
( Top View )
1
2
3
4
8
7
6
5
NC
OUT
FLG
OUT
GND
EN
IN
IN
FLGEN
GND
OUT
OUT
IN
1
3
2
4
5
6
U-DFN2018-6
( Top View )
Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
AP2181/ AP2191 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
2 of 17
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March 2015
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AP2181/ AP2191
Typical Applications Circuit
0
00
0.
..
.1
11
1uF
uFuF
uF
IN
ININ
IN
GND
GNDGND
GND
EN
ENEN
EN
OUT
OUTOUT
OUT
ON
ONON
ON
120
120120
120uF
uFuF
uF
Power Supply
Power SupplyPower Supply
Power Supply
2
22
2.
..
.7
77
7V to
V to V to
V to 5
55
5.
..
.5
55
5V
VV
V
0
00
0.
..
.1
11
1uF
uFuF
uF
OFF
OFFOFF
OFF
FLG
FLGFLG
FLG
Load
LoadLoad
Load
10
1010
10k
kk
k10
1010
10uF
uFuF
uF
AP
APAP
AP2191
2191 2191
2191 Enable Active High
Enable Active HighEnable Active High
Enable Active High
Available Options
Part Number Channel Enable Pin (EN) Current Limit
(typ)
Recommended Maximum Continuous
Load Current
AP2181 1 Active Low 2.1A 1.5A
AP2191 1 Active High 2.1A 1.5A
Pin Descriptions
Pin
Name
Pin Number Function
SO-8 MSOP-8EP SOT25 U-DFN2018-6
GND 1 1 2 1 Ground
IN
2, 3 2, 3 5 2 Voltage input pin (all IN pins must be tied together externally)
EN 4 4 4 3 Enable input, active low (AP2181) or active high (AP2191)
FLG 5 5 3 4 Over-current and over-temperature fault report.
Open-drain flag is active low when triggered
OUT
6, 7 6, 7 1 5, 6 Voltage output pin (all OUT pins must be tied together externally)
NC
8 8 N/A N/A No internal connection.
Recommend tie to OUT pins
Exposed tab
- Exposed tab - Exposed tab
Exposed pad.
It should be connected to GND and thermal mass for enhanced thermal
impedance. It should not be used as electrical ground conduction path.
AP2181/ AP2191
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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March 2015
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AP2181/ AP2191
Functional Block Diagram
AP2181, AP2191
Thermal
Sense
Driver FLG
OUT
GND
IN
EN
UVLO
Current
Limit
Current
Sense
Deglitch
Absolute Maximum Ratings
(@T
A
= +25°C, unless otherwise specified.)
Symbol Parameter Ratings Units
ESD HBM Human Body Model ESD Protection 4 kV
ESD MM
Machine Model ESD Protection
for MSOP-8EP, SOT25 Packages 400 V
Machine Model ESD Protection
for U-DFN2018-6, SO-8 Packages 300 V
V
IN
Input Voltage 6.5 V
V
OUT
Output Voltage V
IN
+0.3 V
V
EN ,
V
FLG
Enable Voltage 6.5 V
I
LOAD
Maximum Continuous Load Current Internal Limited A
T
J(MAX)
Maximum Junction Temperature +150 °C
T
ST
Storage Temperature Range (Note 4) -65 to +150 °C
Caution: Stresses greater than the 'Absolute Maximum Ratings' specified above, may cause permanent damage to the device. These are stress ratings only;
functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be
affected by exposure to absolute maximum rating conditions for extended periods of time.
Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling
and transporting these devices
Note: 4. UL Recognized Rating from -30°C to +70°C (Diodes qualified
T
ST
from -65°C to +150°C).
Recommended Operating Conditions
(@T
A
= +25°C, unless otherwise specified.)
Symbol
Parameter
Min
Max
Units
V
IN
Input Voltage 2.7 5.5 V
I
OUT
Output Current 0 1.5 A
T
A
Operating Ambient Temperature -40 +85 °C
V
IH
High-Level Input Voltage on EN or
EN
2.0 V
IN
V
V
IL
Low-Level Input Voltage on EN or
EN
0 0.8 V
AP2181/ AP2191 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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AP2181/ AP2191
Electrical Characteristics
(@T
A
= +25°C, VIN = +5V, unless otherwise specified.)
Symbol Parameter Test Conditions Min Typ Max Unit
V
UVLO
Input UVLO R
LOAD
= 1k 1.6 1.9 2.5 V
I
SHDN
Input Shutdown Current Disabled, I
OUT
= 0 0.5 1 µA
I
Q
Input Quiescent Current Enabled, I
OUT
= 0 45 70 µA
I
LEAK
Input Leakage Current Disabled, OUT grounded 1 µA
I
REV
Reverse Leakage Current Disabled, V
IN
= 0V, V
OUT
= 5V, I
REV
at V
IN
1 µA
R
DS(ON)
Switch On-Resistance
V
IN
= 5V,
I
OUT
= 1.5A
T
A
= +25°C SOT25, MSOP-8EP, SO-8 95 115
m
U-DFN2018-6 90 110
-40°C T
A
+85°C 140
V
IN
= 3.3V,
I
OUT
= 1.5A
T
A
= +25°C 120 140
-40°C T
A
+85°C 170
I
SHORT
Short-Circuit Current Limit Enabled into short circuit, C
L
= 100µF 2.0 A
I
LIMIT
Over-Load Current Limit V
IN
= 5V, V
OUT
= 4.5V, C
L
= 120µF, -40°C T
A
+85°C 1.6 2.1 2.6 A
I
Trig
Current Limiting Trigger Threshold Output Current Slew Rate (<100A/s) , C
L
= 100µF 2.6 A
V
IL
EN Input Logic Low Voltage V
IN
= 2.7V to 5.5V 0.8 V
V
IH
EN Input Logic High Voltage V
IN
= 2.7V to 5.5V 2 V
I
SINK
EN Input Leakage V
EN
= 5V 1 µA
T
D(ON)
Output Turn-On Delay Time C
L
= 1µF, R
LOAD
= 10 0.05 ms
T
R
Output Turn-On Rise Time C
L
= 1µF, R
LOAD
= 10 0.6 1.5 ms
T
D(OFF)
Output Turn-Off Delay Time C
L
= 1µF, R
LOAD
= 10 0.01 ms
T
F
Output Turn-Off Fall Time C
L
= 1µF, R
LOAD
= 10 0.05 0.1 ms
R
FLG
FLG Output FET On-Resistance I
FLG
= 10mA, C
L
= 100µF 20 40
T
Blank
FLG Blanking Time C
IN
= 10µF, C
L
= 100µF 4 7 15 ms
T
SHDN
Thermal Shutdown Threshold Enabled, R
LOAD
= 1k +140 °C
T
HYS
Thermal Shutdown Hysteresis +25 °C
θ
JA
Thermal Resistance Junction-to-
Ambient
SO-8 (Note 5) 110 °C/W
MSOP-8EP (Note 6) 60 °C/W
SOT25 (Note 7) 157 °C/W
U-DFN2018-6 (Note 8) 70 °C/W
Notes: 5. Test condition for SO-8: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.
6. Test condition for MSOP-8EP: Device mounted on 2” x 2” FR-4 substrate PC board, 2oz copper, with minimum recommended pad on top layer and
thermal vias to bottom layer ground plane.
7. Test condition for SOT25: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.
8. Test condition for U-DFN2018-6: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad on top layer and 3 vias to bottom
layer 1.0”x1.4” ground plane.
AP2181/ AP2191 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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AP2181/ AP2191
Typical Performance Characteristics
V
VV
V
EN
ENEN
EN
90
9090
90%
%%
%
V
VV
V
OUT
OUTOUT
OUT
T
TT
T
D
DD
D(
((
(ON
ONON
ON)
))
)
10
1010
10%
%%
%
T
TT
T
D
DD
D(
((
(OFF
OFFOFF
OFF)
))
)
50
5050
50%
%%
%50
5050
50%
%%
%
T
TT
T
R
RR
R
10
1010
10%
%%
%
90
9090
90%
%%
%
T
TT
T
F
FF
F
V
VV
V
EN
ENEN
EN
90
9090
90%
%%
%
V
VV
V
OUT
OUTOUT
OUT
T
TT
T
D
DD
D(
((
(ON
ONON
ON)
))
)
10
1010
10%
%%
%
T
TT
T
D
DD
D(
((
(OFF
OFFOFF
OFF)
))
)
50
5050
50%
%%
%50
5050
50%
%%
%
T
TT
T
R
RR
R
10
1010
10%
%%
%
90
9090
90%
%%
%
T
TT
T
F
FF
F
Figure 1 Voltage Waveforms: AP2181 (left), AP2191 (right)
All Enable Plots are for AP2191 Active High
Turn-On Delay and Rise Time
400µs/div
Turn-Off Delay and Fall Time
400µs/div
Turn-On Delay and Rise Time
400µs/div
Turn-Off Delay and Fall Time
400µs/div
Vout
2V/div
Ven
5V/div
CL = 1µF
TA = +25°C
RL = 5
Vout
2V/div
Ven
5V/div
CL = 1µF
TA = +25°C
RL = 5
Vout
2V/div
Ven
5V/div
CL = 100µF
TA = +25°C
RL = 5
Vout
2V/div
Ven
5V/div
CL = 100µF
TA = +25°C
RL = 5
AP2181/ AP2191 ——J v —" ’ . n e V .—.—..—— a: t _ — : ;.____......_..______._.______ w H ‘l ‘ ._._.___—. __ V — —_.3 On "9 a- 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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AP2181/ AP2191
Typical Performance Characteristics
(continued)
Short Circuit Current,
Device Enabled Into Short
500µs/div
Inrush Current
1ms/div
0.6
Load Connected to Enabled Device
2ms/div
Short Circuit with Blanking Time and Recovery
20ms/div
Power On
1ms/div
UVLO Increasing
1ms/div
Iout
1A/div
Vflag
2V/div
VIN = 5V
TA = +25°C
CL = 100µF
TA = +25°C
CL = 68µF
RL = 3.3
Iout
2A/div
Vout
5V/div
Vin
5V/div
Vflag
5V/div
VIN = 5V
TA = +25°C
CL = 100µF
Vflag
5V/div
Iout
500mA/div
Ven
5V/div
Vin
2V/div
Iout
500mA/div
TA = +25°C
CL = 68µF
RL = 3.3
Iout
500mA/div
Ven
5V/div
VIN = 5V
TA = +25°C
CL = 100µF
Iout
500mA/div
Ven
5V/div
V
IN
= 5V
T
A
= +25°C
R
L
= 3.3
C
L
= 470uF
C
L
= 220uF
C
L
= 100uF
x AP2181/ AP2191 / n = .251: u = .25c n = .251: i 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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AP2181/ AP2191
Typical Performance Characteristics
(cont.)
UVLO Decreasing
10ms/div
Current Limit Response vs Peak Current
0
5
10
15
20
25
30
35
40
45
0 2 4 6 8 10 12
Peak Current (A)
Current Limit Response (us)
Turn-On Time vs Input Voltage
250
350
450
550
650
750
850
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Input Voltage (V)
Turn-On Time (us)
Turn-Off Time vs Input Voltage
25
30
35
40
45
50
55
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Input Voltage (V)
Turn-Off Time (us)
Rise Time vs Input Voltage
300
350
400
450
500
550
600
650
2 2.5 3 3.5 4 4.5 5 5.5 6
Input Voltage (V)
Rise Time (us)
Fall Time vs Input Voltage
19
20
21
22
23
24
25
2 2.5 3 3.5 4 4.5 5 5.5 6
Input Voltage (V)
Fall Time (us)
CL = 1µF
RL =10
T
A
= +25°C
CL = 1µF
RL = 10
T
A
= +25°C
CL = 1µF
RL = 10
TA = +25°C
CL = 1µF
RL = 10
T
A
= +25°C
Iout
500mA/div
Vin
2V/div
TA = +25°C
CL = 68µF
RL = 3.3
VIN = 5V
T
A
= +25°C
AP2181/ AP2191 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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March 2015
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AP2181/ AP2191
Typical Performance Characteristics
(cont.)
Supply Current, Output Enabled vs Ambient Temperature
27
32
37
42
47
52
-60 -40 -20 0 20 40 60 80 100
Ambient TemperatureC)
Supply Current, Output Enabled (uA)
Supply Current, Output Disabled vs Ambient Temperature
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
-60 -40 -20 0 20 40 60 80 100
Ambient TemperatureC)
Supply Current, Output Disabled (uA)
Static Drain-Source On-State Resistance vs Ambient
Temperature
80
90
100
110
120
130
140
150
160
170
180
-60 -40 -20 0 20 40 60 80 100
Ambient TemperatureC)
Static Drain-Source On-State
Resistance (m)
Short-Circuit Output Current vs Ambient Temperature
2.00
2.10
2.20
2.30
2.40
2.50
2.60
-60 -40 -20 0 20 40 60 80 100
Ambient TemperatureC)
Short-Circuit Output Current (A)
Undervoltage Lockout vs Ambient Temperature
1.90
1.95
2.00
2.05
2.10
2.15
-60 -40 -20 0 20 40 60 80 100
Ambient Temperature (°C)
Undervoltage Lockout (V)
Threshold Trip Current vs Input Voltage
3.08
3.10
3.12
3.14
3.16
3.18
3.20
3.22
3.24
2.8 3.3 3.8 4.3 4.8 5.3
Input Voltage (V)
Threshold Trip Current (A)
UVLO Falling
UVLO Rising
Vin = 2.7V
Vin = 3.3V
Vin = 5V
Vin = 2.7V
Vin = 3.3V
Vin = 5.0V
Vin = 5.5V
TA = +25°C
C
L
= 68µF
CL = 100uF
Vin = 2.7V
Vin = 5.0V
Vin = 3.3V
Vin = 5.5V
Vin = 5.0V
Vin = 5.5V
Vin = 3.3V
Vin = 2.7V
AP2181/ AP2191 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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AP2181/ AP2191
Application Information
Power Supply Considerations
A 0.01-µF to 0.1-µF X7R or X5R ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value
electrolytic capacitor on the input (10-µF minimum) and output pin(s) is recommended when the output load is heavy. This precaution reduces
power-supply transients that may cause ringing on the input. Additionally, bypassing the output with a 0.01-µF to 0.1-µF ceramic capacitor improves
the immunity of the device to short-circuit transients.
Over-Current and Short Circuit Protection
An internal sensing FET is employed to check for over-current conditions. Unlike current-sense resistors, sense FETs do not increase the series
resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output
voltage accordingly. Complete shutdown occurs only if the fault stays long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted to GND before the device is enabled or before VIN
has been applied. The AP2181/AP2191 senses the short circuit and immediately clamps output current to a certain safe level namely I
LIMIT
.
In the second condition, an output short or an overload occurs while the device is enabled. At the instance the overload occurs, higher current may
flow for a very short period of time before the current limit function can react. After the current limit function has tripped (reached the over-current
trip threshold), the device switches into current limiting mode and the current is clamped at I
LIMIT
.
In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the
current-limit threshold (I
TRIG
) is reached or until the thermal limit of the device is exceeded. The AP2181/AP2191 is capable of delivering current up
to the current-limit threshold without damaging the device. Once the threshold has been reached, the device switches into its current limiting mode
and is set at I
LIMIT
.
Note that when the output has been shorted to GND at extremely low temperature (< -30°C), a minimum 120-µF electrolytic capacitor on the output
pin is recommended. A correct capacitor type with capacitor voltage rating and temperature characteristics must be properly chosen so that
capacitance value does not drop too low at the extremely low temperature operation. A recommended capacitor should have temperature
characteristics of less than 10% variation of capacitance change when operated at extremely low temp. Our recommended aluminum electrolytic
capacitor type is Panasonic FC series.
FLG Response
When an over-current or over-temperature shutdown condition is encountered, the FLG open-drain output goes active low after a nominal 7-ms
deglitch timeout. The FLG output remains low until both over-current and over-temperature conditions are removed. Connecting a heavy capacitive
load to the output of the device can cause a momentary over-current condition, which does not trigger the FLG due to the 7-ms deglitch timeout.
The AP2181/AP2191 is designed to eliminate false over-current reporting without the need of external components to remove unwanted pulses.
Power Dissipation and Junction Temperature
The low on-resistance of the internal MOSFET allows the small surface-mount packages to pass large current. Using the maximum operating
ambient temperature (T
A
) and R
DS(ON)
, the power dissipation can be calculated by:
P
D
= R
DS(ON)
× I
2
Finally, calculate the junction temperature:
T
J
= P
D
x R
θ
JA
+ T
A
Where:
T
A
= Ambient temperature °C
R
θ
JA
= Thermal resistance
P
D
= Total power dissipation
Thermal Protection
Thermal protection prevents the IC from damage when heavy-overload or short-circuit faults are present for extended periods of time. The
AP2181/AP2191 implements a thermal sensing to monitor the operating junction temperature of the power distribution switch. Once the die
temperature rises to approximately 140°C due to excessive power dissipation in an over-current or short-circuit condition the internal thermal sense
circuitry turns the power switch off, thus preventing the power switch from damage. Hysteresis is built into the thermal sense circuit allowing the
device to cool down approximately 25°C before the switch turns back on. The switch continues to cycle in this manner until the load fault or input
power is removed. The FLG open-drain output is asserted when an over-temperature shutdown or over-current occurs with 7-ms deglitch.
AP2181/ AP2191 Downstream Power Supply USB Pans 3.3V 5V D _ + _ D- AP2181 2.3 W OUT I %fl.1u 1: 20.»? GND USB Conlro‘ EN GND 0.1UF 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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AP2181/ AP2191
Application Information
(continued)
Under-Voltage Lockout (UVLO)
The under-voltage lockout function (UVLO) keeps the internal power switch from being turned on until the power supply has reached at least 1.9V,
even if the switch is enabled. Whenever the input voltage falls below approximately 1.9V, the power switch is quickly turned off. This facilitates the
design of hot-insertion systems where it is not possible to turn off the power switch before input power is removed.
Host/Self-Powered HUBs
Hosts and self-powered hubs (SPH) have a local power supply that powers the embedded functions and the downstream ports (see Figure 2). This
power supply must provide from 5.25V to 4.75V to the board side of the downstream connection under both full-load and no-load conditions. Hosts
and SPHs are required to have current-limit protection and must report over-current conditions to the USB controller. Typical SPHs are desktop
PCs, monitors, printers, and stand-alone hubs.
Figure 2 Typical One-Port USB Host / Self-Powered Hub
Generic Hot-Plug Applications
In many applications it may be necessary to remove modules or pc boards while the main unit is still operating. These are considered hot-plug
applications. Such implementations require the control of current surges seen by the main power supply and the card being inserted. The most
effective way to control these surges is to limit and slowly ramp the current and voltage being applied to the card, similar to the way in which a
power supply normally turns on. Due to the controlled rise times and fall times of the AP2181/AP2191, these devices can be used to provide a
softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the AP2181/AP2191 also ensures that the switch is off
after the card has been removed, and that the switch is off during the next insertion.
By placing the AP2181/AP2191 between the VCC input and the rest of the circuitry, the input power reaches these devices first after insertion. The
typical rise time of the switch is approximately 1ms, providing a slow voltage ramp at the output of the device. This implementation controls system
surge current and provides a hot-plugging mechanism for any device.
Dual-Purpose Port Applications
AP2181/AP2191 is not recommended for use in dual-purpose port applications in which a single port is used for data communication between the
host and peripheral devices while simultaneously maintaining a charge to the battery of the peripheral device. An example of a non-recommended
application is a shared HDMI/MHL (Mobile High-definition Link) port that allows streaming video between an HDTV or set-top box and a
smartphone or tablet while maintaining a charge to the smartphone or tablet battery. If a voltage is maintained across the output of the
AP2181/AP2191 when the output is disabled and the Vin of the device is subsequently ramped up, an overstress condition to the AP2181/AP2191
may result.
1Q @ 73 @ AP2181/ AP2191 APZ1X1XXG -x t—T.—1;|_T 1% Ell-Ha chmnsl Puck-gs Ere-n Pucklng 8 : Active Law 1 :1 annual W: 90125 G : Guam 7: 7' Tap-R- Rpal I : AmivaHigh S : 30-8 13:13“ Taps I: Raul HF : MMP-GEP FM : U-DFN201 3-6 W W W W 4773!: 4 F7 x » HQ—W fl 0~ flmxx M 52:52 ' x U U U U W W W W %*3H1M:6Y ‘ , 1XX fl weekt Zrepresens :- I: I: I: 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
Ordering Information
Part Number Package Code
AP21X1WG-7 W
AP21X1SG-13 S
AP21X1MPG-13 MP
AP21X1FMG-7 FM
Marking Information
(1) SO-8
Part Number
Logo
8 : Active Low
9 : Active High
(2) MSOP-8EP
Part Number
Logo
8 : Active Low
9 : Active High
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Packaging 7”/
13” Tape and Reel
Quantity
SOT25 3,000/Tape & Reel
SO-8 2,500/Tape & Reel
MSOP-8EP 2,500/Tape & Reel
U-DFN2018-6 3,000/Tape & Reel
AP
AP AP
AP21
2121
21X
XX
X
X
XX
X
(
( (
( Top view
Top view Top view
Top view )
))
)
YY
YYYY
YY
WW
WWWW
WW
X
XX
X
X
XX
X
WW : Week : 01~52;
52
YY : Year : 08, 09,10
~
G : Green
X : Internal Code
8 7 6 5
12 3 4
1 : 1 Channel
represents 52 and 53
AP21X X
( Top view )
Y W X E
Y : Year : 0~9
A~Z : Green
8 7 6 5
12 3 4
1 : 1 Channel
a~z : 27~52 week;
z represents
W : Week : A~Z : 1~26
week
52 and 53 week
MSOP-8L-EP
March 2015
© Diodes Incorporated
AP2181/ AP2191
13 Tape and Reel
Part Number Suffix
-7
-13
-13
-7
52
~
week
z represents
week
;
AP2181/ AP2191 W W a I 2§2S II !! 2S M! Li Ll |_l , (Top View) fl . Identificanon Code H X ' Year ' 0~9 1V1! fl'Week'A~Z'1~25week; - a~z . 27~52 week, 2 represents 52 and 53 week X ' A~Z ' Green 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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March 2015
© Diodes Incorporated
AP2181/ AP2191
Marking Information
(continued)
(3) SOT25
1 2 3
5
7
4
XX Y W X
XX : Identification code
W : Week : A~Z : 1~26 week;
X : A~Z : Green
( Top View )
Y : Year 0~9
a~z : 27~52 week; z represents
52 and 53 week
Device Package type Identification Code
AP2181W SOT25 HX
AP2191W SOT25 HY
(4) U-DFN2018-6
Device Package type Identification Code
AP2181FM U-DFN2018-6 HX
AP2191FM U-DFN2018-6 HY
AP2181/ AP2191 Damn ‘A‘ 0 J i Gauge mane ‘ Wang 7 L Detail C Fc L: 51 , f See new 0 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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March 2015
© Diodes Incorporated
AP2181/ AP2191
Package Outline Dimensions
(All dimensions in mm.)
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version.
(1) Package Type: SO-8
(2) Package Type: MSOP-8EP
SO
-
8
Dim
Min
Max
A
- 1.75
A1
0.10 0.20
A2
1.30 1.50
A3
0.15 0.25
b
0.3 0.5
D
4.85 4.95
E
5.90 6.10
E1
3.85 3.95
e
1.27 Typ
h
- 0.35
L
0.62 0.82
θ
θθ
θ
0
°
8
°
All Dimensions in mm
MSOP
-
8EP
Dim
Min
Max
Typ
A
- 1.10 -
A1
0.05 0.15 0.10
A2
0.75 0.95 0.86
A3
0.29 0.49 0.39
b
0.22 0.38 0.30
c
0.08 0.23 0.15
D
2.90 3.10 3.00
D1
1.60 2.00 1.80
E
4.70 5.10 4.90
E1
2.90 3.10 3.00
E2
1.30 1.70 1.50
E3
2.85 3.05 2.95
e
- - 0.65
L
0.40 0.80 0.60
a
x
- - 0.750
y
- - 0.750
All Dimensions in mm
Gauge Plane
Seating Plane
Detail A
Detail A
E
E1
h
L
D
eb
A2
A1
A
45
°
7
°~
9
°
A3
0.254
1
D
A
A1
A2
E
e
y
x
Seating Plane
Gauge Plane
L
D
8Xb
See Detail C
Detail C
c
a
E1
E3
A3
E2
4
X
1
0
°
4
X
1
0
°
0
.
2
5
D1
AP2181/ AP2191 *Ik__ HEIEI I? L ,1 u- N2018- + + m n ax A 545 605 575 D 750 875 D2 E V41 4: T 1: ail +94,+ 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
14 of 17
www.diodes.com
March 2015
© Diodes Incorporated
AP2181/ AP2191
Package Outline Dimensions
(All dimensions in mm.)
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version.
(3) Package Type: SOT25
(4) Package Type: U-DFN2018-6
SOT25
Dim
Min
Max
Typ
A
0.35 0.50
0.38
B
1.50 1.70
1.60
C
2.70 3.00
2.80
D
0.95
H
2.90 3.10
3.00
J
0.013
0.10
0.05
K
1.00 1.30
1.10
L
0.35 0.55
0.40
M
0.10 0.20
0.15
N
0.70 0.80
0.75
α
αα
α
All Dimensions in mm
U
-
DFN2018
-
6
Dim
Min
Max
Typ
A
0.545
0.605
0.575
A1
0 0.05
0.02
A3
0.13
b
0.15
0.25
0.20
D
1.750
1.875
1.80
D2
1.30
1.50
1.40
e
0.50
E
1.95
2.075
2.00
E2
0.90
1.10
1.00
L
0.20
0.30
0.25
z
0.30
All Dimensions in mm
A
M
J
L
D
B C
H
KN
SEATING PLANE
EE2
L
A
D
D2
A3
A1
e
b
Pin#1 ID
z
AP2181/ AP2191 I+++I T T 4_+ +—l— |<>I
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
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March 2015
© Diodes Incorporated
AP2181/ AP2191
Suggested Pad Layout
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
(1) Package Type: SO-8
(2) Package Type: MSOP-8EP
(3) Package Type: SOT25
Dimensions
Value (in mm)
X
0.60
Y
1.55
C1
5.4
C2
1.27
Dimensions
Value
(in mm)
C
0.650
G
0.450
X
0.450
X1
2.000
Y
1.350
Y1
1.700
Y2
5.300
Dimensions
Value (in mm)
Z
3.20
G
1.60
X
0.55
Y
0.80
C1 2.40
C2
0.95
X
C1
C2
Y
G
X
C
Y
Y2
Y
1
X1
X
Z
Y
C1
C2C2
G
» AP2181/ AP2191 Top cover age thickness Embossed tamer 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
16 of 17
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March 2015
© Diodes Incorporated
AP2181/ AP2191
Suggested Pad Layout
(continued)
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
(4) Package Type: U-DFN2018-6
Taping Orientation
For U-DFN2018-6
Notes: 9. The taping orientation of the other package type can be found on our website at http://www.diodes.com/datasheets/ap02007.pdf.
Dimensions
Value (in mm)
C
0.50
G
0.20
X
0.25
X1
1.60
Y
0.35
Y1
1.20
Y
X
C
X1
G
Y1
AP2181/ AP2191 2015
AP2181/ AP2191
Document number: DS31563 Rev. 8 - 2
17 of 17
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March 2015
© Diodes Incorporated
AP2181/ AP2191
IMPORTANT NOTICE
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
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application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
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website, harmless against all damages.
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.
Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings
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This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the
final and determinative format released by Diodes Incorporated.
LIFE SUPPORT
Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.
Copyright © 2015, Diodes Incorporated
www.diodes.com